AT91SAM7S32-AI ATMEL [ATMEL Corporation], AT91SAM7S32-AI Datasheet - Page 377

• Manufacturer Part Number: AT91SAM7S32-AI
• Description: AT91 ARM Thumb-based Microcontrollers
• Manufacturer: ATMEL [ATMEL Corporation]

AT91SAM7S32 Preliminary
Figure 166. Synchronized Period or Duty Cycle Update
User's Writing
PWM_CUPDx Value
0
1
PWM_CMRx. CPD
PWM_CPRDx
PWM_CDTYx
End of Cycle
To prevent overwriting the PWM_CUPDx by software, the user can use status events in order
to synchronize his software. Two methods are possible. In both, the user must enable the ded-
icated interrupt in PWM_IER at PWM Controller level.
The first method (polling method) consists of reading the relevant status bit in PWM_ISR Reg-
ister according to the enabled channel(s). See Figure 167.
The second method uses an Interrupt Service Routine associated with the PWM channel.
Note:
Reading the PWM_ISR register automatically clears CHIDx flags.
Figure 167. Polling Method
PWM_ISR Read
Acknowledgement and clear previous register state
Writing in CPD field
Update of the Period or Duty Cycle
CHIDx = 1
YES
Writing in PWM_CUPDx
The last write has been taken into account
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6071A–ATARM–28-Oct-04