AT91SAM7S32-AI ATMEL [ATMEL Corporation], AT91SAM7S32-AI Datasheet - Page 436

• Manufacturer Part Number: AT91SAM7S32-AI
• Description: AT91 ARM Thumb-based Microcontrollers
• Manufacturer: ATMEL [ATMEL Corporation]

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AT91SAM7S32 Preliminary
Clock Generator........................................................................................... 151
Power Management Controller (PMC) ....................................................... 154
Debug Unit (DBGU) ..................................................................................... 173
Description ...................................................................................................... 151
Overview.......................................................................................................... 173
Block Diagram................................................................................................. 174
Product Dependencies................................................................................... 175
UART Operations............................................................................................ 175
Debug Unit User Interface ............................................................................. 182
Slow Clock RC Oscillator ............................................................................. 151
Main Oscillator ............................................................................................. 151
Divider and PLL Block .................................................................................. 153
Description ................................................................................................... 154
Master Clock Controller................................................................................ 154
Processor Clock Controller .......................................................................... 154
Peripheral Clock Controller .......................................................................... 155
Programmable Clock Output Controller ....................................................... 155
Programming Sequence .............................................................................. 155
Clock Switching Details ................................................................................ 158
Power Management Controller (PMC) User Interface ................................ 161
I/O Lines....................................................................................................... 175
Power Management ..................................................................................... 175
Interrupt Source ........................................................................................... 175
Baud Rate Generator ................................................................................... 175
Receiver ....................................................................................................... 176
Transmitter ................................................................................................... 178
Peripheral Data Controller............................................................................ 179
Test Modes .................................................................................................. 179
Debug Communication Channel Support..................................................... 180
Chip Identifier ............................................................................................... 181
ICE Access Prevention ................................................................................ 181
Debug Unit Control Register ........................................................................ 183
Debug Unit Mode Register ........................................................................... 184
Debug Unit Interrupt Enable Register .......................................................... 185
Debug Unit Interrupt Disable Register ......................................................... 186
Debug Unit Interrupt Mask Register ............................................................. 187
Debug Unit Status Register.......................................................................... 188
Debug Unit Receiver Holding Register ........................................................ 190
Debug Unit Transmit Holding Register......................................................... 191
Debug Unit Baud Rate Generator Register.................................................. 191
Debug Unit Chip ID Register........................................................................ 192
Debug Unit Chip ID Extension Register ....................................................... 195
6071A–ATARM–28-Oct-04