AT91SAM7S32-AI ATMEL [ATMEL Corporation], AT91SAM7S32-AI Datasheet - Page 368

no-image

AT91SAM7S32-AI

Manufacturer Part Number
AT91SAM7S32-AI
Description
AT91 ARM Thumb-based Microcontrollers
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
TC Interrupt Mask Register
Register Name: TC_IMR
Access Type:
• COVFS: Counter Overflow
0 = The Counter Overflow Interrupt is disabled.
1 = The Counter Overflow Interrupt is enabled.
• LOVRS: Load Overrun
0 = The Load Overrun Interrupt is disabled.
1 = The Load Overrun Interrupt is enabled.
• CPAS: RA Compare
0 = The RA Compare Interrupt is disabled.
1 = The RA Compare Interrupt is enabled.
• CPBS: RB Compare
0 = The RB Compare Interrupt is disabled.
1 = The RB Compare Interrupt is enabled.
• CPCS: RC Compare
0 = The RC Compare Interrupt is disabled.
1 = The RC Compare Interrupt is enabled.
• LDRAS: RA Loading
0 = The Load RA Interrupt is disabled.
1 = The Load RA Interrupt is enabled.
• LDRBS: RB Loading
0 = The Load RB Interrupt is disabled.
1 = The Load RB Interrupt is enabled.
• ETRGS: External Trigger
0 = The External Trigger Interrupt is disabled.
1 = The External Trigger Interrupt is enabled.
368
ETRGS
31
23
15
7
AT91SAM7S32 Preliminary
Read-only
LDRBS
30
22
14
6
LDRAS
29
21
13
5
CPCS
28
20
12
4
CPBS
27
19
11
3
CPAS
26
18
10
2
LOVRS
25
17
1
9
6071A–ATARM–28-Oct-04
COVFS
24
16
8
0

Related parts for AT91SAM7S32-AI