AT91SAM7S32-AI ATMEL [ATMEL Corporation], AT91SAM7S32-AI Datasheet - Page 236
AT91SAM7S32-AI
Manufacturer Part Number
AT91SAM7S32-AI
Description
AT91 ARM Thumb-based Microcontrollers
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.AT91SAM7S32-AI.pdf
(446 pages)
- Current page: 236 of 446
- Download datasheet (3Mb)
SPI Control Register
Name:
Access Type:
• SPIEN: SPI Enable
0 = No effect.
1 = Enables the SPI to transfer and receive data.
• SPIDIS: SPI Disable
0 = No effect.
1 = Disables the SPI.
All pins are set in input mode and no data is received or transmitted.
If a transfer is in progress, the transfer is finished before the SPI is disabled.
If both SPIEN and SPIDIS are equal to one when the control register is written, the SPI is disabled.
• SWRST: SPI Software Reset
0 = No effect.
1 = Reset the SPI. A software-triggered hardware reset of the SPI interface is performed.
• LASTXFER: Last Transfer
0 = No effect.
1 = The current NPCS will be deasserted after the character written in TD has been transferred. When CSAAT is set, this
allows to close the communication with the current serial peripheral by raising the corresponding NPCS line as soon as TD
transfer has completed.
236
SWRST
31
23
15
–
–
–
7
AT91SAM7S32 Preliminary
SPI_CR
Write-only
30
22
14
–
–
–
6
–
29
21
13
–
–
–
–
5
28
20
12
–
–
–
–
4
27
19
11
–
–
–
3
–
26
18
10
–
–
–
2
–
SPIDIS
25
17
–
–
–
1
9
6071A–ATARM–28-Oct-04
LASTXFER
SPIEN
24
16
–
8
–
0
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