AT91SAM7S32-AI ATMEL [ATMEL Corporation], AT91SAM7S32-AI Datasheet - Page 279

• Manufacturer Part Number: AT91SAM7S32-AI
• Description: AT91 ARM Thumb-based Microcontrollers
• Manufacturer: ATMEL [ATMEL Corporation]

Receiver Time-out
6071A–ATARM–28-Oct-04
Table 64 indicates the maximum length of a timeguard period that the transmitter can handle
in relation to the function of the Baud Rate.
Table 64. Maximum Timeguard Length Depending on Baud Rate
The Receiver Time-out provides support in handling variable-length frames. This feature
detects an idle condition on the RXD line. When a time-out is detected, the bit TIMEOUT in the
Channel Status Register (US_CSR) rises and can generate an interrupt, thus indicating to the
driver an end of frame.
The time-out delay period (during which the receiver waits for a new character) is programmed
in the TO field of the Receiver Time-out Register (US_RTOR). If the TO field is programmed at
0, the Receiver Time-out is disabled and no time-out is detected. The TIMEOUT bit in
US_CSR remains at 0. Otherwise, the receiver loads a 16-bit counter with the value pro-
grammed in TO. This counter is decremented at each bit period and reloaded each time a new
character is received. If the counter reaches 0, the TIMEOUT bit in the Status Register rises.
The user can either:
•
•
If STTTO is performed, the counter clock is stopped until a first character is received. The idle
state on RXD before the start of the frame does not provide a time-out. This prevents having to
obtain a periodic interrupt and enables a wait of the end of frame when the idle state on RXD
is detected.
If RETTO is performed, the counter starts counting down immediately from the value TO. This
enables generation of a periodic interrupt so that a user time-out can be handled, for example
when no key is pressed on a keyboard.
Figure 112 shows the block diagram of the Receiver Time-out feature.
Obtain an interrupt when a time-out is detected after having received at least one
character. This is performed by writing the Control Register (US_CR) with the STTTO
(Start Time-out) bit at 1.
Obtain a periodic interrupt while no character is received. This is performed by writing
US_CR with the RETTO (Reload and Start Time-out) bit at 1.
Baud Rate
115200
Bit/sec
14400
19200
28800
33400
56000
57600
1 200
9 600
Bit time
AT91SAM7S32 Preliminary
69.4
52.1
34.7
29.9
17.9
17.4
833
104
8.7
µs
Timeguard
212.50
26.56
17.71
13.28
8.85
7.63
4.55
4.43
2.21
ms
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