AT91SAM7S32-AI ATMEL [ATMEL Corporation], AT91SAM7S32-AI Datasheet - Page 110

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AT91SAM7S32-AI

Manufacturer Part Number
AT91SAM7S32-AI
Description
AT91 ARM Thumb-based Microcontrollers
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
Flash Lock
Commands
Flash General
Purpose NVM
Commands
110
AT91SAM7S32 Preliminary
Lock bits can be set using WPL or EWPL commands. They can also be set by using the Set
Lock command (SLB). With this command, several lock bits can be activated. A Bit Mask is
provided as argument to the command. When bit 0 of the bit mask is set, then the first lock bit
is activated.
In the same way, the Clear Lock command (CLB) is used to clear lock bits. All the lock bits
are also cleared by the EA command.
Table 27. Set and Clear Lock Bit Command
Lock bits can be read using Get Lock Bit command (GLB). The n
bit n of the bit mask is set..
Table 28. Get Lock Bit Command
General-purpose NVM bits (GP NVM bits) can be set using the Set Fuse command (SFB).
This command also activates GP NVM bits. A bit mask is provided as argument to the com-
mand. When bit 0 of the bit mask is set, then the first GP NVM bit is activated.
In the same way, the Clear Fuse command (CFB) is used to clear general-purpose NVM bits.
All the general-purpose NVM bits are also cleared by the EA command. The general-purpose
NVM bit is deactived when the corresponding bit in the pattern value is set to 1.
Table 29. Set/Clear GP NVM Command
General-purpose NVM bits can be read using the Get Fuse Bit command (GFB). The n
NVM bit is active when bit n of the bit mask is set..
Table 30. Get GP NVM Bit Command
Step
1
2
Step
1
2
Step
1
2
Step
1
2
Handshake Sequence
Write handshaking
Write handshaking
Handshake Sequence
Write handshaking
Read handshaking
Handshake Sequence
Write handshaking
Write handshaking
Handshake Sequence
Write handshaking
Read handshaking
MODE[3:0]
MODE[3:0]
DATA
MODE[3:0]
CMDE
DATA
CMDE
DATA
MODE[3:0]
CMDE
DATA
CMDE
DATA[7:0]
SLB or CLB
DATA[7:0]
GLB
Lock Bit Mask Status
0 = Lock bit is cleared
1 = Lock bit is set
DATA[7:0]
SFB or CFB
GP NVM bit pattern value
DATA[7:0]
GFB
GP NVM Bit Mask Status
0 = GP NVM bit is cleared
1 = GP NVM bit is set
Bit Mask
th
lock bit is active when the
6071A–ATARM–28-Oct-04
th
GP

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