AT91SAM7S32-AI ATMEL [ATMEL Corporation], AT91SAM7S32-AI Datasheet - Page 181

• Manufacturer Part Number: AT91SAM7S32-AI
• Description: AT91 ARM Thumb-based Microcontrollers
• Manufacturer: ATMEL [ATMEL Corporation]

Chip Identifier
ICE Access
Prevention
6071A–ATARM–28-Oct-04
The Debug Unit features two chip identifier registers, DBGU_CIDR (Chip ID Register) and
DBGU_EXID (Extension ID). Both registers contain a hard-wired value that is read-only. The
first register contains the following fields:
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•
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The second register is device-dependent and reads 0 if the bit EXT is 0.
The Debug Unit allows blockage of access to the system through the ARM processor's ICE
interface. This feature is implemented via the register Force NTRST (DBGU_FNR), that allows
assertion of the NTRST signal of the ICE Interface. Writing the bit FNTRST (Force NTRST) to
1 in this register prevents any activity on the TAP controller.
On standard devices, the bit FNTRST resets to 0 and thus does not prevent ICE access.
This feature is especially useful on custom ROM devices for customers who do not want their
on-chip code to be visible.
EXT - shows the use of the extension identifier register
NVPTYP and NVPSIZ - identifies the type of embedded non-volatile memory and its size
ARCH - identifies the set of embedded peripheral
SRAMSIZ - indicates the size of the embedded SRAM
EPROC - indicates the embedded ARM processor
VERSION - gives the revision of the silicon
AT91SAM7S32 Preliminary
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