XC3S100E-4CP132GI XILINX [Xilinx, Inc], XC3S100E-4CP132GI Datasheet - Page 94

• Manufacturer Part Number: XC3S100E-4CP132GI
• Description: Spartan-3E FPGA Family: Complete Data Sheet
• Manufacturer: XILINX [Xilinx, Inc]

Functional Description
successful, the FPGA then triggers a MultiBoot event, caus-
ing the FPGA to reconfigure from the opposite end of the
Flash PROM memory. This second configuration contains
the FPGA application for normal operation.
In another potential application, the initial design loaded into
the FPGA image contains a “golden” or “fail-safe” configura-
tion image, which then communicates with the outside
world and checks for a newer image. If there is a new con-
figuration revision and the new image verifies as good, the
“golden” configuration triggers a MultiBoot event to load the
new image.
When a MultiBoot event is triggered, the FPGA then again
drives its configuration pins as described in
94
First Configuration
Parallel Flash PROM
Di agnostics
Application
Application
User Area
General
FPGA
FPGA
Figure 60: Use MultiBoot to Load Alternate Configuration Images
FFFFFF
0
> 300 ns
Table
58. How-
STARTUP_SPARTAN3E
GSR
GTS
MBT
CLK
www.xilinx.com
Similarly, the general FPGA application could trigger
another MultiBoot event at any time to reload the diagnos-
tics design, and so on.
ever, the FPGA does not assert the PROG_B pin. The sys-
tem design must ensure that no other device drives on
these same pins during the reconfiguration process. The
FPGA’s DONE, LDC[2:0], or HDC pins can temporarily dis-
able any conflicting drivers during reconfiguration.
Asserting the PROG_B pin Low overrides the MultiBoot fea-
ture and forces the FPGA to reconfigure starting from the
end of memory defined by the mode pins, shown in
Table
57.
Reconfigure
Second Configuration
P arallel Flash PROM
DS312-2 (v3.4) November 9, 2006
Di agnostics
Application
Application
User Area
General
FPGA
FPGA
Product Specification
DS312-2_51_103105
FFFFFF
0
R