XC3S100E-4CP132GI XILINX [Xilinx, Inc], XC3S100E-4CP132GI Datasheet - Page 127

• Manufacturer Part Number: XC3S100E-4CP132GI
• Description: Spartan-3E FPGA Family: Complete Data Sheet
• Manufacturer: XILINX [Xilinx, Inc]

I/O Timing
Table 85: Pin-to-Pin Clock-to-Output Times for the IOB Output Path
DS312-3 (v3.4) November 9, 2006
Product Specification
Notes:
1.
2.
3.
Clock-to-Output Times
T
Symbol
ICKOFDCM
T
The numbers in this table are tested using the methodology presented in
Table 76
This clock-to-output time requires adjustment whenever a signal standard other than LVCMOS25 is assigned to the Global Clock Input or a
standard other than LVCMOS25 with 12 mA drive and Fast slew rate is assigned to the data Output. If the former is true, add the appropriate
Input adjustment from
DCM output jitter is included in all measurements.
ICKOF
R
and
When reading from the
Output Flip-Flop (OFF),
the time from the active
transition on the Global
Clock pin to data
appearing at the Output
pin. The DCM is iuses.
When reading from OFF,
the time from the active
transition on the Global
Clock pin to data
appearing at the Output
pin. The DCM is not used.
Table
79.
Description
Table
90. If the latter is true, add the appropriate Output adjustment from
LVCMOS25
output drive, Fast slew
rate, with DCM
LVCMOS25
output drive, Fast slew
rate, without DCM
Conditions
www.xilinx.com
(2)
(2)
, 12mA
, 12mA
(3)
Table 94
XC3S100E
XC3S250E
XC3S500E
XC3S1200E
XC3S1600E
XC3S100E
XC3S250E
XC3S500E
XC3S1200E
XC3S1600E
Device
and are based on the operating conditions set forth in
Abs. Min.
0.92
1.14
1.14
1.15
1.14
1.96
1.79
1.82
1.96
2.0
-0
Table
DC and Switching Characteristics
Speed Grade
93.
Max
2.66
3.00
3.01
3.01
3.00
5.60
4.91
4.98
5.36
5.45
-5
Max
2.79
3.45
3.46
3.46
3.45
5.92
5.43
5.51
5.94
6.05
-4
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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