XC3S100E-4CP132GI XILINX [Xilinx, Inc], XC3S100E-4CP132GI Datasheet - Page 231

• Manufacturer Part Number: XC3S100E-4CP132GI
• Description: Spartan-3E FPGA Family: Complete Data Sheet
• Manufacturer: XILINX [Xilinx, Inc]

Revision History
The following table shows the revision history for this document.
DS312-4 (v3.4) November 9, 2006
Product Specification
03/01/05
03/21/05
11/23/05
03/22/06
05/19/06
11/09/06
Date
R
Version
1.0
1.1
2.0
3.0
3.1
3.4
Initial Xilinx release.
Added XC3S250E in the CP132 package to
pairs on CP132. Added pinout and footprint information for the CP132, FG400, and FG484
packages. Removed IRDY and TRDY pins from the VQ100, TQ144, and PQ208 packages.
Corrected title of
the FG400 package, affecting
assignment were not affected. Added
package mass values to
Included I/O pins, not just input-only pins under the VREF description in
that some global clock inputs are Input-only pins in
XC3S100E in the CP132 package, affecting
Table
not an Input-only pin. Corrected the I/O counts for the XC3S1600E in the FG320 package,
affecting
XC3S1600E balls N14 and N15 in
Minor text edits.
Added package thermal data for the XC3S100E in the CP132 package to
Corrected pin migration arrows for balls E17 and F4 between the XC3S500E and
XC3S1600E in
modules to v3.4.
135, and
Table
128,
Figure
Table
Table
Table
150. Promoted Module 4 to Production status. Synchronized all
82. Ball A12 on the XC3S1600E in the FG320 package a full I/O pin,
www.xilinx.com
152. Updated differential pair numbering for some pins in Bank 0 of
Table
149,
Table 151
124.
Table
Table
150, and
Package Thermal Characteristics
Revision
and
147.
Table
Table
Figure
Figure
128. Corrected number of differential I/O
128,
Table
88. Pin functionality and ball
87. Corrected pin type for
Table
123. Added information on the
129,
Table
Pinout Descriptions
Table
132,
Table
section. Added
123. Clarified
Table
129.
133,
231