XC3S100E-4CP132GI XILINX [Xilinx, Inc], XC3S100E-4CP132GI Datasheet - Page 219

• Manufacturer Part Number: XC3S100E-4CP132GI
• Description: Spartan-3E FPGA Family: Complete Data Sheet
• Manufacturer: XILINX [Xilinx, Inc]

Table 151: FG400 Package Pinout (Continued)
User I/Os by Bank
Table 152
distributed between the four I/O banks on the FG400 pack-
age.
Table 152: User I/Os Per Bank for the XC3S1200E and XC3S1600E in the FG400 Package
Footprint Migration Differences
The XC3S1200E and XC3S1600E FPGAs have identical
footprints in the FG400 package. Designs can migrate
between the XC3S1200E and XC3S1600E FPGAs without
further consideration.
DS312-4 (v3.4) November 9, 2006
Product Specification
Notes:
1.
Top
Right
Bottom
Left
TOTAL
VCCAUX VCCAUX
VCCAUX VCCAUX
VCCAUX VCCAUX
VCCAUX VCCAUX
VCCAUX VCCAUX
VCCAUX VCCAUX
VCCAUX VCCAUX
VCCAUX VCCAUX
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
Bank
Package
The eight global clock pins in this bank have optional functionality during configuration and are counted in the DUAL column.
Edge
indicates how the 304 available user-I/O pins are
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
R
I/O Bank
XC3S1200E
XC3S1600E
Pin Name
0
1
2
3
Maximum
304
I/O
78
74
78
74
FG400
M14
Ball
D11
H12
U10
H11
H13
L17
J10
N9
H9
K4
J7
J8
VCCAUX
VCCAUX
VCCAUX
VCCAUX
VCCAUX
VCCAUX
VCCAUX
VCCAUX
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
Type
156
I/O
43
35
30
48
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Table 151: FG400 Package Pinout (Continued)
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
INPUT
Bank
20
12
18
12
62
All Possible I/O Pins by Type
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
DUAL
XC3S1200E
XC3S1600E
21
24
46
Pin Name
1
0
VREF
24
6
6
6
6
Pinout Descriptions
FG400
Ball
M11
M13
N10
N12
K11
J12
L10
L12
M9
N8
K9
CLK
0
0
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
16
8
8
(1)
(1)
Type
219