XC3S100E-4CP132GI XILINX [Xilinx, Inc], XC3S100E-4CP132GI Datasheet - Page 131

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XC3S100E-4CP132GI

Manufacturer Part Number
XC3S100E-4CP132GI
Description
Spartan-3E FPGA Family: Complete Data Sheet
Manufacturer
XILINX [Xilinx, Inc]
Datasheet
Table 91: Timing for the IOB Output Path
DS312-3 (v3.4) November 9, 2006
Product Specification
Notes:
1.
2.
Clock-to-Output Times
T
Propagation Times
T
T
Set/Reset Times
T
T
IOCKP
IOOP
IOOLP
IOSRP
IOGSRQ
Symbol
The numbers in this table are tested using the methodology presented in
Table 76
This time requires adjustment whenever a signal standard other than LVCMOS25 with 12 mA drive and Fast slew rate is assigned to the data
Output. When this is true, add the appropriate Output adjustment from
R
and
Table
When reading from the
Output Flip-Flop (OFF), the
time from the active transition
at the OCLK input to data
appearing at the Output pin
The time it takes for data to
travel from the IOB’s O input
to the Output pin
The time it takes for data to
travel from the O input
through the OFF latch to the
Output pin
Time from asserting the
OFF’s SR input to
setting/resetting data at the
Output pin
Time from asserting the
Global Set Reset (GSR)
input on the
STARTUP_SPARTAN3E
primitive to setting/resetting
data at the Output pin
79.
Description
LVCMOS25
output drive, Fast slew
rate
LVCMOS25
output drive, Fast slew
rate
LVCMOS25
output drive, Fast slew
rate
www.xilinx.com
Conditions
(2)
(2)
(2)
, 12 mA
, 12 mA
, 12 mA
Table
Table 94
93.
and are based on the operating conditions set forth in
Device
All
All
All
DC and Switching Characteristics
Abs. Min.
0.88
0.90
0.94
1.32
3.38
-0
Speed Grade
Max
2.18
2.24
2.32
3.27
8.40
-5
Max
2.50
2.58
2.67
3.76
9.65
-4
Units
ns
ns
ns
ns
ns
131

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