m37905 Renesas Electronics Corporation., m37905 Datasheet - Page 543

no-image

m37905

Manufacturer Part Number
m37905
Description
Mitsubishi 16-bit Single-chip Microcomputer 7700 Family / 7900 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
m37905F8CSP
Manufacturer:
MIT
Quantity:
20 000
APPENDIX
Appendix 8. 7905 Group Q & A
20-112
accepted in this
interval
Interrupt request is
Suppose that there is a routine which should not accept a certain interrupt request. (This routine can
accept any of the other interrupt request.)
Although the interrupt priority level select bits for a certain interrupt are set to “000
although this interrupt is set to be disabled), this interrupt request is actually accepted immediately
after the change of the priority level. Why did this occur, and what should I do about it?
As for the change of the interrupt priority level, if the following are met, the microcomputer may
pretend to accept an interrupt request immediately after this interrupt is set to be disabled:
•The next instruction (in the above example, it is the LDA instruction) is already stored into a instruc-
•Requirements for accepting the interrupt request which should not be accepted are satisfied immediately
When writing to a memory or an I/O, the CPU passes an address and data to the BIU. Then, the CPU
executes the next instruction in the instruction queue buffer while the BIU is writing data into the
actual address. Detection of the interrupt priority level is performed at the beginning of each instruction.
In the above case, the CPU executes the next instruction before the BIU completes the change of
the interrupt priority level. Therefore, in the detection of the interrupt priority level performed synchronously
with the execution of the next instruction, actually, the interrupt priority level before the change is
used to detection, and its interrupt request is accepted.
Interrupt priority detection time
A
Q
tion queue buffer of the BIU.
before the next instruction in the instruction queue buffer is executed.
Sequence of execution
CPU operation
BIU operation
MOVMB XXXIC, #00H ; Writes “000
LDA
(Instruction prefetched)
A,DATA
:
:
Previous instruction
7905 Group User’s Manual Rev.1.0
executed
; Clears the interrupt request bit to “0.”
; Instruction at the beginning of the routine which
;
should not accept a certain interrupt request.
Interrupt request generated
MOVMB instruction
Writing to interrupt priority level select bits.
executed
2
” to the interrupt priority level select bits.
Interrupt request accepted
Change of interrupt priority level
LDA instruction
executed
2
” (in other words,
completed
Interrupts
(1/2)

Related parts for m37905