m37905 Renesas Electronics Corporation., m37905 Datasheet - Page 416
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m37905
Manufacturer Part Number
m37905
Description
Mitsubishi 16-bit Single-chip Microcomputer 7700 Family / 7900 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.M37905.pdf
(565 pages)
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Fig. 19.2.2 Setting and Terminate procedures for flash memory CPU reprogramming mode
19.2.3 Setting and Terminate procedure for flash memory CPU reprogramming mode
Figure 19.2.2 shows the setting and terminate procedures for the flash memory CPU reprogramming mode.
In the flash memory CPU reprogramming mode, opcodes cannot be fetched for the internal flash memory.
Therefore, be sure to transfer the reprogramming control software to an area other than the internal flash
memory and then execute the software in that area.
Moreover, in order to prevent any interrupt occurrence during the flash memory CPU reprogramming mode,
before selecting this mode, be sure to set the interrupt disable flag (I) to “1” or set the interrupt priority level
to “000
Also, we recommend to connect pins P4OUT
Even in the flash memory CPU reprogramming mode, periodically writing to the watchdog timer is required
in order to prevent the watchdog timer interrupt occurrence.
At the same time, it is necessary to write to the watchdog timer just before executing the programming,
block erase, or erase all blocks command in order to prevent the watchdog timer interrupt occurrence
during the automatic programming and erase operation.
An interrupt, hardware reset, or software reset, generated in the flash memory CPU reprogramming mode,
makes program runaway. If a program runaway has occurred, be sure to push the microcomputer into the
power-on reset state.
When an interrupt or reset is generated during the programming or erase operation, the contents of the
corresponding block becomes invalidated.
2
” (interrupts disabled).
Notes 1: Before termination of the flash memory CPU reprogramming mode, be sure to execute the read array
Interrupt disable flag (I) = “1”
or Interrupt priority level of each interrupt = “000
to an area other than the internal flash memory.
The reprogramming control software for the flash
memory CPU reprogramming mode is transferred
Jump to the control software transferred in the
above procedure
(The subsequent procedures will be executed
by the reprogramming control software trans-
ferred in the above procedure.)
2: After writing of “1” to the flash memory reset bit, be sure to confirm the RY/BY status bit (bit 0 at address
3: When the flash memory CPU reprogramming mode has been terminated with the user ROM area select
Internal ROM bus cycle select bit
(bit 7 at address 5F
command or flash memory reset
9E
bit (bit 5 at address 9E
16
) becomes “1”; and then, write “0” to this bit.
Single-chip mode,
or Boot mode
.
16
)
7905 Group User’s Manual Rev.1.0
16
) = “1,” the access to the user ROM area is selected.
.
“0”
19.2 Flash memory CPU reprogramming mode
CUT
2
and P6OUT
”
FLASH MEMORY VERSION
Reprogramming control
software
CPU reprogramming mode select bit
CPU reprogramming mode select bit
CPU reprogramming mode select bit
Read array command is executed,
or Flash memory reset bit
CUT
Jump to an arbitrary address in the
internal flash memory area.
Flash memory reset bit
User ROM area select bit
(Only in the boot mode ) (Note 3)
User ROM area select bit
(Only in the boot mode)
with V
Software command is executed.
CC
via resistors, respectively.
“0”
“1”
(Notes 1, 2)
“0”
“1”
“0”
“1”
“0”
19-13
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