m37905 Renesas Electronics Corporation., m37905 Datasheet - Page 305
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m37905
Manufacturer Part Number
m37905
Description
Mitsubishi 16-bit Single-chip Microcomputer 7700 Family / 7900 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.M37905.pdf
(565 pages)
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SERIAL I/O
11.4 Clock asynchronous serial I/O (UART) mode
Fig. 11.4.11 Processing after reception is completed
11-50
Reading of receive data
UART0 receive buffer register (Addresses 37
UART1 receive buffer register (Addresses 3F
UART2 receive buffer register (Addresses B7
Notes 1: When performing the processing after the reception is completed, using an interrupt,
b15
0
0
2: This figure shows the bits and registers required for the processing.
Checking completion of reception
UART0 transmit/receive control register 1 (Address 35
UART1 transmit/receive control register 1 (Address 3D
UART2 transmit/receive control register 1 (Address B5
UART0 transmit/receive control register 1 (Address 35
UART1 transmit/receive control register 1 (Address 3D
UART2 transmit/receive control register 1 (Address B5
Checking error
UART0 transmit/receive control register 1 (Address 35
UART1 transmit/receive control register 1 (Address 3D
UART2 transmit/receive control register 1 (Address B5
0
Checking error
be sure to select the receive interrupt (UARTi receive interrupt mode select bit = “0”).
See Figure 11.4.13 for the change of flag state and the occurrence timing of an
interrupt request.
b7
b7
b7
0
Processing after reading out receive data
0
[When not using interrupts]
0
0
b8
1
1
b7
1
7905 Group User’s Manual Rev.1.0
b0
b0
b0
Receive complete flag
Framing error flag
Parity error flag
Error sum flag
Overrun error flag
0 : Reception not completed
1 : Reception completed
0 : No error
1 : Error detected
0 : No overrun error
1 : Overrun error detected
16
16
16
, 36
, 3E
, B6
16
16
16
)
)
)
b0
Read out receive data.
16
16
16
16
16
16
16
16
16
)
)
)
)
)
)
)
)
)
[When using interrupts]
A UARTi receive interrupt request
occurs when reception is completed.
UARTi receive interrupt
(Note 1)
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