m37905 Renesas Electronics Corporation., m37905 Datasheet - Page 226
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m37905
Manufacturer Part Number
m37905
Description
Mitsubishi 16-bit Single-chip Microcomputer 7700 Family / 7900 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.M37905.pdf
(565 pages)
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Fig. 10.2.6 Structure of three-phase output data register 0 (three-phase waveform mode)
10.2.3 Three-phase output data register 0
Figure 10.2.6 shows the structure of the three-phase output data register 0 (the three-phase waveform
mode).
For bits 7 and 6, refer to section “10.2.2 Dead-time timer.”
(1) W-phase output fix bit (bit 0)
(2) V-phase output fix bit (bit 1)
(3) U-phase output fix bit (bit 2)
(4) W-phase output polarity set buffer (bit 3)
Three-phase output data register 0 (Address A8
X: It may be either “0” or “1.”
Note: This bit is invalid in three-phase mode 1.
Setting of this bit to “1” fixes the output level at the W-phase waveform output pin to the level which
is selected by the W-phase fixed output’s polarity set bit (bit 0 at address A9
level at the W-phase waveform output pin is reversed.
Setting of this bit to “1” fixes the output level at the V-phase waveform output pin to the level which
is selected by the V-phase fixed output’s polarity set bit (bit 1 at address A9
level at the V-phase waveform output pin is reversed.
Setting of this bit to “1” fixes the output level at the U-phase waveform output pin to the level which
is selected by the U-phase fixed output’s polarity set bit (bit 2 at address A9
level at the U-phase waveform output pin is reversed.
This bit serves as the buffer to set the W-phase output polarity and is used in three-phase mode 0.
(Refer to section “10.2.9 Output polarity set toggle flip-flop.”)
5, 4
Bit
0
1
2
3
6
7
W-phase output fix bit
V-phase output fix bit
U-phase output fix bit
W-phase output polarity set buffer
(Valid in three-phase mode 0.)
Clock-source-of-dead-time-timer
select bits
Invalid in the three-phase waveform mode.
Bit name
(Note)
7905 Group User’s Manual Rev.1.0
THREE-PHASE WAVEFORM MODE
b7 b6
0 : Released from output fixation
1 : Output fixed
0 : Released from output fixation
1 : Output fixed
0 : Released from output fixation
1 : Output fixed
0 : “H” output
1 : “L” output
0 0 : f
0 1 : f
1 0 : f
1 1 : Do not select.
2
2
2
/2
/4
16
)
Function
b7 b6 b5 b4 b3 b2 b1 b0
10.2 Block description
16
16
16
); vice versa, the output
); vice versa, the output
); vice versa, the output
X X
At reset
0
0
0
0
0
0
0
R/W
RW
RW
RW
RW
RW
RW
RW
10-9
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