m37905 Renesas Electronics Corporation., m37905 Datasheet - Page 388

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m37905

Manufacturer Part Number
m37905
Description
Mitsubishi 16-bit Single-chip Microcomputer 7700 Family / 7900 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet

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Fig. 17.2.2 Structure of debug control register 0
17.2.1 Debug control register 0
Figure 17.2.2 shows the structure of the debug control register 0.
(1) Detect condition select bits (bits 0 to 2)
Debug control register 0
Notes 1: These bits are valid when the detect enable bit (bit 5) = “1.” Therefore, these bits must be set before or simultaneously with
These bits are used to select an occurrence condition for an address matching detection interrupt
request. This condition can be selected from the following:
Bit
0
1
2
3
4
5
6
7
An address matching detection interrupt request occurs when the contents of PG and PC match
with the address being set in the address compare register 0 (addresses 68
section “17.3 Address matching detection mode.”)
An address matching detection interrupt request occurs when the contents of PG and PC match
with the address being set in the address compare register 1 (addresses 6B
section “17.3 Address matching detection mode.”)
An address matching detection interrupt request occurs when the contents of PG and PC match
with the address being set in the address compare register 0 (addresses 68
compare register 1 (addresses 6B
mode.”)
An address matching detection interrupt request occurs when the contents of PG and PC are less
than the address being set in the address compare register 0 (addresses 68
than the address compare register 1 (addresses 6B
address-area detection mode.”)
Out-of-address-area detection
Address matching detection 0
Address matching detection 1
Address matching detection 2
2: At power-on reset, each bit becomes “0”; at hardware reset or software reset, each bit retains the value immediately
setting of the detect enable bit to “1.”
before reset.
Detect condition select bits
(Note 1)
Fix these bits to “00.”
Detect enable bit
Fix this bit to “0.”
The value is “1” at reading.
Bit name
(Address 66
16
7905 Group User’s Manual Rev.1.0
)
b2 b1 b0
0 0 0 : Do not select.
0 0 1 : Address matching detection 0
0 1 0 : Address matching detection 1
0 1 1 : Address matching detection 2
1 0 0 : Do not select.
1 0 1 : Out-of-address-area detection
1 1 0 :
1 1 1 :
0 : Detection disabled.
1 : Detection enabled.
16
to 6D
Do not select.
16
); (Refer to section “17.3 Address matching detection
Function
16
to 6D
DEBUG FUNCTION
16
); (Refer to section “17.4 Out-of-
b7 b6 b5 b4 b3 b2 b1 b0
17.2 Block description
0
(Note 2)
(Note 2)
(Note 2)
(Note 2)
(Note 2)
(Note 2)
(Note 2)
16
0 0
At reset
16
16
16
to 6A
1
to 6A
to 6D
to 6A
16
16
16
R/W
RW
RW
RW
RW
RW
RW
RW
) or address
16
); (Refer to
); (Refer to
) or larger
17-3

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