m37905 Renesas Electronics Corporation., m37905 Datasheet - Page 276
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m37905
Manufacturer Part Number
m37905
Description
Mitsubishi 16-bit Single-chip Microcomputer 7700 Family / 7900 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.M37905.pdf
(565 pages)
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the functions of I/O pins in this mode.
11.3 Clock synchronous serial I/O mode
Table 11.3.1 lists the performance overview in the clock synchronous serial I/O mode, and Table 11.3.2 lists
Table 11.3.1 Performance overview in clock synchronous serial I/O mode
Table 11.3.2 Functions of I/O pins in clock synchronous serial I/O mode
TxD
RxD
CLK
Port P1 direction register: address 05
Port P8 direction register: address 14
Internal/External clock select bit: bit 3 at addresses 30
TxD
TxD
TxD
Note: The TxD
Transfer data format
Transfer rate
Transmit/Receive control
CTS
(P1
P8
11.3.1 Transfer clock (Synchronizing clock)
Data transfer is performed synchronously with a transfer clock. For the transfer clock, the following selection
is possible:
The transfer clock is generated by operation of the transmit control circuit. Accordingly, even when performing
only reception, set the transmit enable bit to “1,” and set dummy data in the UARTi transmit buffer register
in order to make the transmit control circuit active.
(1) Internal generation of transfer clock
0
Whether to generate a transfer clock internally or to input it from the external.
Polarity of transfer clock.
i
0
, P8
i
i
0
1
2
, P1
Pin name
(P1
/P1
/P1
/P8
(P1
(P1
i
, RTS
The count source selected with the BRG count source select bits is divided by the BRGi, and the
BRGi output is further divided by 2. This divided output is the transfer clock. The transfer clock is
output from the CLK
Transfer clock’s frequency =
3
3
7
3
2
1
1
1
, P1
, P1
, P1
, P1
)
switch bit: bit 2 at address AC
switch bit: bit 3 at address AC
switch bit: bit 5 at address AC
i
7
6
5
4
, P8
, P8
, P8
, P1
When selecting internal clock
When selecting external clock
i
pin outputs “H” level until transmission starts after UARTi’s operating mode is selected.
3
2
1
5
)
)
)
,
Item
Serial data output pin
Programmable I/O port pin
Serial data input pin
Programmable I/O port pin
Transfer clock output pin
Transfer clock input pin
CTS input pin
RTS output pin
Programmable I/O port
Functions
i
pin.
16
16
7905 Group User’s Manual Rev.1.0
2 (n+1)
16
16
16
f
i
TxD
(Dummy data is output when performing only reception.) (Note)
TxD
Port P1 or P8 direction register’s corresponding bit = “0”
– (Can be used as an I/O port pin when performing only transmission.)
Internal/External clock select bit = “0”
Internal/External clock select bit = “1”
See Table 11.2.1.
Transfer data has a length of 8 bits.
LSB first or MSB first can be selected by software.
BRGi’s output divided by 2
Maximum 5 Mbps
CTS function or RTS function can be selected by software.
0
0
/P1
/P1
3
3
, TxD
, TxD
f
n: Setting value of BRGi
i
: Frequency of BRGi’s count source (f
11.3 Clock synchronous serial I/O mode
16
, 38
1
1
/P1
/P1
16
7
7
, B0
, or TxD
, or TxD
Method of selection
16
2
2
/P8
Functions
/P8
3
3
switch bit = “0”
switch bit = “1”
SERIAL I/O
2
, f
16
, f
64
, or f
11-21
512
)
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