m37905 Renesas Electronics Corporation., m37905 Datasheet - Page 190

• Manufacturer Part Number: m37905
• Description: Mitsubishi 16-bit Single-chip Microcomputer 7700 Family / 7900 Series
• Manufacturer: Renesas Electronics Corporation.

(1) RTP0
(2) RTP1
(3) Pulse output trigger select bits (bits 7, 6 at address A8
(4) Pulse width modulation enable bits 0 to 2 (bits 0 to 2 at Address A9
(5) Pulse output polarity select bit (bit 3 at address A9
(6) RTP1
(7) RTP1
Each time when an underflow occurs in timer A3, the contents which have been written to these bits are output
from the corresponding pulse output pins (Note).
Note that, in pulse mode 1, the pulses with the negative polarity are not output from pins RTP1
Each time when a pulse output trigger is generated, the contents written to these bits are output from
the corresponding pulse output pins (Note). The pulse output trigger can be selected by the pulse
output trigger select bits (bits 7, 6 at address A8
These bits are valid in pulse mode 1.
Each time when a pulse output trigger is generated, the contents written to these bits are output from
the corresponding pulse output pins (Note). The pulse output trigger can be selected by the pulse
output trigger select bits (bits 7, 6 at address A8
These bits are invalid in pulse mode 0.
The pulse output trigger can be selected from an internal trigger and an external trigger. When using
an external trigger (input signal to pin RTP
corresponding to port P5
These bits are used to select the pins, where the pulse width modulation is to be applied. Synchronous
with a pulse output trigger, the contents of these bits become valid. Table 9.2.4 lists the pulse-width-
modulation-relevant bits.
When this bit = “0,” the data corresponding to the contents which have been set in the RTP0
RTP0
When this bit = “1,” the contents which have been set in the RTP0
output data bits are reversed (in other words, pulses with the negative polarity are generated here.);
and then, these pulses with the negative polarity are output from pins RTP0
RTP1
These bits are valid in pulse mode 0.
Each time when an underflow occurs in timer A3, the contents which have been written to these bits
are output from the corresponding pulse output pins (Note).
These bits are invalid in pulse mode 1.
Note: The output level at a pulse output pin is undefined in the period from when data is written to
3
3
0
0
0
2
, RTP1
.
, RTP1
, RTP1
, RTP1
these bits until the first occurrence of a pulse output trigger. If it is necessary to avoid this state,
perform “Processing of avoiding undefined output before starting pulse output” in Figure 9.4.2.
to RTP0
0
1
1
3
to RTP1
pulse output data bits (bits 4, 5 at address A8
pulse output data bits (bits 4, 5 at address A9
pulse output data bits (bits 6, 7 at address A9
3
pulse output data bits (bits 0 to 3 at address A8
3
pulse output data bits are output from pins RTP0
3
pin, in order to set this port P5
7905 Group User’s Manual Rev.1.0
9.2 Block description of pulse output port 0
TRG0
PULSE OUTPUT PORT MODE
), be sure to clear the port P5 direction register’s bit,
16
16
).
).
16
)
3
pin for the input mode.
16
)
16
16
16
0
)
)
)
to RTP0
16
)
0
to RTP0
16
)
3
, RTP1
0
to RTP0
3
, RTP1
0
to RTP1
2
and RTP1
3
0
, RTP1
to RTP1
3
pulse
0
0
9-9
3
.
to
to
3
.