m37905 Renesas Electronics Corporation., m37905 Datasheet - Page 288
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m37905
Manufacturer Part Number
m37905
Description
Mitsubishi 16-bit Single-chip Microcomputer 7700 Family / 7900 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.M37905.pdf
(565 pages)
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The receive operations are described below:
Valid edge : A rising edge is selected when the CLK polarity select bit = “0.”
The receive complete flag is cleared to “0” when the low-order byte of the UARTi receive buffer register
is read out. Figure 11.3.11 shows the receive operation, and Figure 11.3.12 shows an example of receive
timing (when an external clock is selected).
When the transfer format select bit is “1” (MSB first), each bit’s position of this register’s contents is
reversed, and then the resultant data is read out.
The signal input to the RxD
The contents of the UARTi receive register are shifted, bit by bit, to the right.
Steps
When 1-byte data has been prepared in the UARTi receive register, the contents of this register are
Simultaneously with step
synchronously with the valid edge of the clock output from the CLK
CLK
transferred to the UARTi receive buffer register.
interrupt is selected (UARTi receive interrupt mode select bit = “0”), a UARTi receive interrupt request
occurs and its interrupt request bit is set to “1.”
i
pin.
and
A falling edge is selected when the CLK polarity select bit = “1.”
are repeated at each valid edge of the clock output from the CLK
, the receive complete flag is set to “1.” Additionally, when the receive
i
pin is taken into the most significant bit of the UARTi receive register
7905 Group User’s Manual Rev.1.0
11.3 Clock synchronous serial I/O mode
i
pin or input to the CLK
SERIAL I/O
i
pin or input to the
i
pin.
11-33
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