m37905 Renesas Electronics Corporation., m37905 Datasheet - Page 417

• Manufacturer Part Number: m37905
• Description: Mitsubishi 16-bit Single-chip Microcomputer 7700 Family / 7900 Series
• Manufacturer: Renesas Electronics Corporation.

FLASH MEMORY VERSION
19.2 Flash memory CPU reprogramming mode
19-14
19.2.4 Software commands
Software commands are described below.
Software commands and data must be read from and written into even-numbered addresses in the user
ROM area, 16 bits at a time. At writing of a command code, the high-order 8 bits (D
(1) Read array command
(2) Read status register command
(3) Clear status register command
(4) Programming
Writing command code “FF
When an address to be read is input at the next and the following bus cycles, the contents at the
specified address are output to the data bus (D
The read array mode is maintained until another software command is written.
Writing command code “70
data bus (D
Writing command code “50
to “0.” (See Table 19.2.2.)
This command executes programming, one word
at a time. Write command code “40
1st bus cycle and then write data at the 2nd
bus cycle, 16 bits at a time. After writing of
one word has been completed, the automatic
programming (programming and verification of
data) operation is initiated. During the automatic
programming operation, be sure not to access
the flash memory or not to execute the next
command. The completion of the automatic
programming can be recognized by the RY/BY
status bit (bit 0 at address 9E
After the automatic programming operation has
been completed, the result of it can be
recognized by reading out the status register.
(Refer to section “19.2.5 Full status check.”)
Figure 19.2.3 shows the programming operation
flowchart.
Note that, for the areas having already been
programmed, be sure to program after an erase
(block erase) operation. If the programming
command is executed for the areas having
already been programmed, no programming error
will occur, but the contents of the areas become
undefined.
0
to D
7
) by a read at the 2nd bus cycle. (See Table 19.2.2.)
16
16
16
” at the 1st bus cycle clears two bits (SR.4 and SR.5) of the status register
” at the 1st bus cycle pushes the microcomputer into the read array mode.
” at the 1st bus cycle outputs the contents of the status register to the
16
).
7905 Group User’s Manual Rev.1.0
16
” at the
0
Fig. 19.2.3 Programming operation flowchart
to D
15
), 16 bits at a time.
operation is completed.
arbitrary write address.
Data is written to an
RY/BY status bit = “1”?
(bit 0 at address 9E
Full status check
Command code
“40
Programming
16
” is written.
Start
YES
16
)
8
••• See Figure 19.2.6.
to D
NO
15
) are ignored.