m37905 Renesas Electronics Corporation., m37905 Datasheet - Page 156
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m37905
Manufacturer Part Number
m37905
Description
Mitsubishi 16-bit Single-chip Microcomputer 7700 Family / 7900 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.M37905.pdf
(565 pages)
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Fig. 8.2.4 Structure of timer Bi interrupt control register
8.2.4 Timer Bi interrupt control register
Figure 8.2.4 shows the structure of the timer Bi interrupt control register. For details about interrupts, refer
to “CHAPTER 6. INTERRUPTS.”
(1) Interrupt priority level select bits (bits 2 to 0)
(2) Interrupt request bit (bit 3)
Note: When writing to this bit, use the MOVM (MOVMB) or STA (STAB, STAD) instruction.
Timer Bi interrupt control register (i = 0 to 2) (Addresses 7A
select the priority level from levels 1 through 7. When a timer Bi interrupt request occurs, its priority
level is compared with the processor interrupt priority level (IPL), so that the requested interrupt is
enabled only when its priority level is higher than the IPL. (However, this applies when the interrupt
disable bit (I) = “0.”) To disable timer Bi interrupts, set these bits to “000
when the timer Bi interrupt request is accepted. This bit can be set to “1” or cleared to “0” by
software.
These bits are used to select a timer Bi interrupt’s priority level. When using timer Bi interrupts,
This bit is set to “1” when a timer Bi interrupt request occurs. This bit is automatically cleared to “0”
7 to 4
Bit
0
1
2
3
Interrupt priority level select bits
Interrupt request bit
Nothing is assigned.
Bit name
7905 Group User’s Manual Rev.1.0
b2 b1 b0
0 : No interrupt requested
1 : Interrupt requested
0 0 0 : Level 0 (Interrupt disabled)
0 0 1 : Level 1
0 1 0 : Level 2
0 1 1 : Level 3
1 0 0 : Level 4
1 0 1 : Level 5
1 1 0 : Level 6
1 1 1 : Level 7
Function
16
to 7C
16
)
b7 b6 b5 b4 b3 b2 b1 b0
8.2 Block description
2
” (level 0).
Undefined
At reset
0
0
0
0
TIMER B
(Note)
R/W
RW
RW
RW
RW
—
8-5
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