m37905 Renesas Electronics Corporation., m37905 Datasheet - Page 124

• Manufacturer Part Number: m37905
• Description: Mitsubishi 16-bit Single-chip Microcomputer 7700 Family / 7900 Series
• Manufacturer: Renesas Electronics Corporation.

Fig. 7.4.2 Initial setting example for registers related to event counter mode (1)
7.4.1 Setting for event counter mode
Figures 7.4.2 and 7.4.3 show an initial setting example for registers related to the event counter mode.
Note that when using interrupts, set up to enable the interrupts. For details, refer to “CHAPTER 6.
INTERRUPTS.”
Setting up–down register
b7
b7
(b15)
Setting divide ratio
b7
Selecting event counter mode and each function
b7
0
b0
b0
(b8)
b0
Timer A2 two–phase pulse
signal processing select bit
Timer A3 two–phase pulse
signal processing select bit
Timer A0 up–down bit
Timer A1 up–down bit
Timer A2 up–down bit
Timer A3 up–down bit
Timer A4 up–down bit
Timer A4 two–phase pulse
signal processing select bit
Timer A5 up–down bit
Timer A6 up–down bit
Timer A7 up–down bit
Timer A8 up–down bit
Timer A9 up–down bit
Timer A7 two–phase pulse
signal processing select bit
Timer A8 two–phase pulse
signal processing select bit
Timer A9 two–phase pulse
signal processing select bit
Up–down register 0 (Address 44
Up–down register 1 (Address C4
7905 Group User’s Manual Rev.1.0
b7
Can be set to“0000
0 1
Continued to Figure 7.4.3
b0
Selection of event counter mode
Count polarity select bit
Pulse output function select bit
Up-down switching factor select bit
Timer Ai mode register (i = 0 to 9)
(Addresses 56
on the next page
0: No pulse output
1: Pulse output
0: Counts at falling edge of external signal.
1: Counts at rising edge of external signal.
0: Contents of up-down register
1: Input signal to TAi
16
” to ”FFFF
b0
Set to the corresponding up–down bit when the
contents of the up-down register are selected as
the up-down switching factor.
Set to the corresponding up–down bit when the contents
of the up-down register are selected as the up-down
switching factor.
0: Countdown
1: Countup
0: Countdown
1: Countup
16
The counter divides the count source frequency by (n + 1)
when counting down, or by (FFFF
16
16
16
X: It may be either “0” or “1.”
to 5A
)
)
” (n).
OUT
16
, D6
Timer A0 register (Addresses 47
Timer A1 register (Addresses 49
Timer A2 register (Addresses 4B
Timer A3 register (Addresses 4D
Timer A4 register (Addresses 4F
Timer A5 register (Addresses C7
Timer A6 register (Addresses C9
Timer A7 register (Addresses CB
Timer A8 register (Addresses CD
Timer A9 register (Addresses CF
Set the corresponding bit to “1” when the
two–phase pulse signal processing function
is selected for timers A7 to A9.
Set the corresponding bit to “1” when the
two–phase pulse signal processing function
is selected for timers A2 to A4.
0: Two–phase pulse signal processing
1: Two–phase pulse signal processing
0: Two–phase pulse signal processing
1: Two–phase pulse signal processing
pin
function disabled
function enabled
function disabled
function enabled
16
to DA
16)
16
– n + 1) when counting up.
7.4 Event counter mode
16
16
16
16
16
16
16
16
16
16
, 46
, 48
, 4E
, 4A
, 4C
, C6
, C8
, CE
, CA
, CC
16
16
16
16
16
16
16
16
16
16
)
)
)
)
)
)
)
)
)
)
TIMER A
7-21