m37905 Renesas Electronics Corporation., m37905 Datasheet - Page 466

• Manufacturer Part Number: m37905
• Description: Mitsubishi 16-bit Single-chip Microcomputer 7700 Family / 7900 Series
• Manufacturer: Renesas Electronics Corporation.

Debug control register 0
Notes 1: These bits are valid when the detect enable bit (bit 5) = “1.” Therefore, these bits must be set before or simultaneously with
Debug control register 1
Notes 1: At power-on reset, each bit becomes “0”; at hardware reset or software reset, each bit retains the value immediately before reset.
Bit
Bit
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
2: At power-on reset, each bit becomes “0”; at hardware reset or software reset, each bit retains the value immediately
2: Be sure to set this bit to “1” immediately before the access to the address compare registers 0 and 1 (addresses 68
setting of the detect enable bit to “1.”
before reset.
6D
Detect condition select bits
(Note 1)
Fix these bits to “00.”
Detect enable bit
Fix this bit to “0.”
The value is “1” at reading.
Fix this bit to “0.”
The value is “0” at reading.
Address compare register
access enable bit (Note 2)
Fix this bit to “1” when using the debug function.
Nothing is assigned.
While a debugger is not used, the value is “0” at reading.
While a debugger is used, the value is “1” at reading.
Address-matching-detection 2
decision bit
(Valid when the address match-
The value is “0” at reading.
ing detection 2 is selected.)
16
). Then, be sure to clear this bit to “0” immediately after this access.
Bit name
Bit name
(Address 66
(Address 67
16
16
)
)
7905 Group User’s Manual Rev.1.0
b2 b1 b0
0 0 0 : Do not select.
0 0 1 : Address matching detection 0
0 1 0 : Address matching detection 1
0 1 1 : Address matching detection 2
1 0 0 : Do not select.
1 0 1 : Out-of-address-area detection
1 1 0 :
1 1 1 :
0 : Detection disabled.
1 : Detection enabled.
0 : Disabled.
1 : Enabled.
0 : Matches with the contents of the address com-
1 : Matches with the contents of the address com-
pare register 0.
pare register 1.
Do not select.
Function
Function
Appendix 2. Control registers
b7 b6 b5 b4 b3 b2 b1 b0
b7 b6 b5 b4 b3 b2 b1 b0
0
(Note 2)
(Note 2)
(Note 2)
(Note 2)
(Note 2)
(Note 2)
(Note 2)
(Note 1)
(Note 1)
0 0
At reset
Undefined
At reset
1
APPENDIX
0
0
0
0
0
1
R/W
R/W
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RO
RO
RO
—
—
—
16
0
to
Reference
Reference
17-3
17-4
20-35