m37905 Renesas Electronics Corporation., m37905 Datasheet - Page 367

• Manufacturer Part Number: m37905
• Description: Mitsubishi 16-bit Single-chip Microcomputer 7700 Family / 7900 Series
• Manufacturer: Renesas Electronics Corporation.

to stop oscillation or internal clock. As a result, the power consumption can be saved. The microcomputer
enters the stop mode when the STP instruction has been executed; the microcomputer enters the wait mode
when the WIT instruction has been executed.
STOP AND WAIT MODES
15.1 Overview
15.1 Overview
When there is no need for operation of the central processing unit (CPU), the stop and wait modes are used
The stop and wait modes are terminated by an interrupt request occurrence or hardware reset.
Table 15.1.1 lists the states in the stop and wait modes and operations after these modes are terminated.
Table 15.1.1 States in stop and wait modes and operations after these modes are terminated
15-2
Notes 1: This applies when the PLL circuit operation enable bit (bit 1 at address BC
Oscillation
PLL frequency multiplier
f
f
Wf
to interrupt request
occurrence
to hardware reset
Termination due
Termination due
sys
1
CPU
to f
, clock
32
Timers A, B
Serial I/O
A-D converter
D-A converter
Watchdog timer
Item
2: See Table 15.3.2.
,
, Wf
4096
BIU
Pins
512
1
,
When watchdog timer is used at
termination (See Figure 15.3.1.)
Inactive.
Stopped.
Inactive.
Inactive.
Inactive.
Can operate only in the event counter mode.
Can operate only when an external clock is
selected.
Stopped.
Stopped.
Stopped.
Retains the state at the STP instruction execution.
Supply of
certain time has been measured
by using the watchdog timer.
Operation after hardware reset
CPU
,
BIU
starts after a
Stop mode
7905 Group User’s Manual Rev.1.0
at termination (See Figure 15.3.1.)
When watchdog timer is not used
immediately after termi-
nation (Note 2).
Supply of
CPU
,
BIU
starts
(Bit 3 at address 63
Active.
Operates (Note 1).
Inactive.
Active.
Inactive.
Operates.
Operates.
Operates.
Operates.
Stopped.
Retains the state at the WIT instruction execution.
Supply of
termination.
Operation after hardware reset
System clock is active.
CPU
,
16
Wait mode
= “0”)
BIU
16
) = “1.”
starts immediately after
(Bit 3 at address 63
Inactive.
Can operate only in the
event counter mode.
Can operate only when an
external clock is selected.
Stopped.
Stopped.
System clock is inactive.
16
= “1”)