m37905 Renesas Electronics Corporation., m37905 Datasheet - Page 364
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m37905
Manufacturer Part Number
m37905
Description
Mitsubishi 16-bit Single-chip Microcomputer 7700 Family / 7900 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.M37905.pdf
(565 pages)
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14.2.2 Stop period
The watchdog timer stops its operation in any of the following cases:
When state
it stops its operation. For the watchdog timer’s operation at termination of state
Operation in stop mode.”
14.2.3 Operations in stop mode
When the STP instruction has been executed, a value of “FFF
watchdog timer stops its operation in the stop mode. Immediately after the stop mode termination, the
watchdog timer operates as follows.
(1) When stop mode is terminated by hardware reset
(2) When stop mode is terminated by interrupt occurrence (with watchdog timer used) (Note)
(3) When stop mode is terminated by interrupt occurrence (with watchdog timer not used) (Note)
During Wait mode (Refer to section “15.4 Wait mode.”)
During Stop mode (Refer to section “15.3 Stop mode.”)
Supply of
performs “operation after reset.” (Refer to “CHAPTER 3. RESET.”) The watchdog timer frequency
select bit becomes “0,” and the watchdog timer starts counting of Wf
Immediately after the stop mode termination, the watchdog timer starts counting the count source
selected by the watchdog timer clock source select bits at STP termination (bits 6, 7 at address 61
starting from “FFF
61
(At this time, no watchdog timer interrupt request occurs.)
When supply of
terminate the stop mode is executed. The watchdog timer restarts counting of the count source (Wf
or Wf
Note: For the setting of the usage of the watchdog timer, refer to section “15.3 Stop mode.”
Supply of
interrupt which the microcomputer used to terminate the stop mode is executed. The watchdog timer
restarts counting of the count source (Wf
of the STP instruction, starting from “FFF
Note: For the setting of the usage of the watchdog timer, refer to section “15.3 Stop mode.”
16
). When the most significant bit of the watchdog timer becomes “0,” supply of
512
), which was counted immediately before execution of the STP instruction, starting from “FFF
has been terminated, the watchdog timer restarts counting from the state immediately before
CPU
CPU
and
and
CPU
16
.” It is independent of the watchdog timer frequency select bit (bit 0 at address
BIU
BIU
and
starts immediately after the stop mode termination, and the microcomputer
starts immediately after the stop mode termination, and the routine of the
BIU
starts, the routine of the interrupt which the microcomputer used to
7905 Group User’s Manual Rev.1.0
32
16
or Wf
.”
512
), which was counted immediately before execution
16
” is set to the watchdog timer, and the
WATCHDOG TIMER
14.2 Operation description
512
from “FFF
, refer to section “14.2.3
CPU
16
.”
and
BIU
starts.
14-7
16
16
),
32
.”
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