SDA9410-B13 MICRONAS [Micronas], SDA9410-B13 Datasheet - Page 89

• Manufacturer Part Number: SDA9410-B13
• Description: Display Processor and Scan Rate Converter using Embedded DRAM Technology Units
• Manufacturer: MICRONAS [Micronas]

SDA9410
Table 74
The table below defines the static operation modes for the slave channel. The slave
channel is synchronized to the master channel. Therefore only modes with the same
output line-scanning pattern as the chosen master channel mode are allowed. Several
modes depend on the I²C Bus parameter MEMOP.
Table 75
89
STOPMOS
000
001
010
011
100
101
110
111
000
001
010
011
100
101
110
111
Display line-scanning
pattern sequence
∼∼∼∼
∼ϒ∼ϒ
ϒϒϒϒ
ϒ∼ϒ∼
∼∼ϒϒ
ϒϒ∼∼
Scan rate conversion algorithm
Median, ABAB
Frame repetition, ABAB
Simple 100, AABB
Field repetition, AAAA I
Field repetition, AAAA II
Field repetition, BBBB I
Field repetition, BBBB II
not defined
Median, AB
Frame repetition, AB
Line doubling, AB
Line doubling, AA
Intra field interpolation A+A*
Line doubling, BB
not defined
Intra field interpolation A+A*, B*+B
Display line-scanning pattern sequence
Static operation modes slave
1. to 2.
312
312.5
313
312.5
312
313
allowed for
RMODE
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
2. to 3.
313
312.5
312
312.5
312.5
312.5
Output sync controller (OSCM/S)
allowed output
line-scanning
pattern
∼ϒ∼ϒΙ=ϒ∼ϒ∼
∼ϒ∼ϒΙ=ϒ∼ϒ∼
∼∼ϒϒΙ=ϒϒ∼∼
∼ϒ∼ϒΙ=ϒ∼ϒ∼
∼∼∼∼Ι=ϒϒϒϒ
∼ϒ∼ϒΙ=ϒ∼ϒ∼
∼∼∼∼Ι=ϒϒϒϒ
∼Ηϒ
∼Ηϒ
∼Ηϒ
∼Ηϒ
∼Ηϒ
∼Ηϒ
∼Ηϒ
3. to 4.
312
312.5
313
312.5
313
312
Preliminary Data Sheet
4. to 5.(1.)
313
312.5
312
312.5
312.5
312.5
allowed
MEMOP
00 SRC
00 SRC
all
all
all
all
all
00 SRC
00 SRC
all
all
01 SSC
all
01 SSC
Micronas