SDA9410-B13 MICRONAS [Micronas], SDA9410-B13 Datasheet - Page 109

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SDA9410-B13

Manufacturer Part Number
SDA9410-B13
Description
Display Processor and Scan Rate Converter using Embedded DRAM Technology Units
Manufacturer
MICRONAS [Micronas]
Datasheet
SDA9410
Table 87
5.12
Table 88
The display processing part contains an integrated triple 9-bit DAC and performs digital
enhancements and manipulations of the digital video component signal. The figure
below shows the block diagram of the display processing part and the existing I²C Bus
parameters.
Figure 52
109
YIN
CIN
I²C Bus
parameter
VERINT
VPAN
Signals
IY_O
IU_O
IV_O
8
8
Display processing
BCOF HCOF
CORING
Pin number
87
84
90
Output write I²C Bus parameter
Output signals
Block diagram of display processing
Peaking
Delay
Sub address
47h
54h
9
8
ASCENTCTI
THRESC
ASCENTLTI
THRESY
DCTI
DLTI
Description
Vertical expansion factor for master channel
Vertical adjustment of the output picture for master channel
Description
Analog Y (luminance) output signal
Analog U (chrominance) output signal
Analog V (chrominance) output signal
9
8
YBORDERD
UBORDERD
VBORDERD
Framing
OFC
9
8
Delay
4:4:4
27 MHz
9
9
9
8:8:8
54 MHz
9
9
9
COARSDEL
Coarse
Delay
Delay
Delay
+7/-8
Preliminary Data Sheet
Display processing
9
9
9
CHROM_AMP
DACEN
DAC
DAC
DAC
Micronas
VO
YO
UO

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