SDA9410-B13 MICRONAS [Micronas], SDA9410-B13 Datasheet - Page 149

• Manufacturer Part Number: SDA9410-B13
• Description: Display Processor and Scan Rate Converter using Embedded DRAM Technology Units
• Manufacturer: MICRONAS [Micronas]

SDA9410
149
Sub address 44
Bit
D7...D0
Sub address 45
Bit
D7...D0
Sub address 46
Bit
D7...D5
D4
D3...D2
D1...D0
Name
BLANLEN Length of the signal BLANK in system clocks of X1/CLKD:
Name
PPLOP(7...0)
Name
x
PPLOP(8) Number of pixels between two output H-syncs HOUT (only valid
CAPPM
CAPPS
Function
Length = 4 * BLANLEN [BLANLEN = 180]
Function
Number of pixels between two output H-syncs HOUT (only valid
for HOUTFR=1) in system clocks of X1/CLKD (Bit 7 to 0):
Number of pixels = 2 * PPLOP [PPLOP(7...0) = 176]
Function
xxx
for HOUTFR=1) in system clocks of X1/CLKD (Bit 8):
Number of pixels = 2 * PPLOP [PPLOP(8) = 1]
Reduces the active pixels per line of the master channel
(HORWIDTHM) at the output side = 8 * HORWIDTHM - 2 * k:
k =
24: CAPPM = 11
16: CAPPM = 10
Reduces the active pixels per line of the slave channel
(HORWIDTHS) at the output side = 4 * HORWIDTHS - 2 * k:
k =
24: CAPPS = 11
16: CAPPS = 10
8: CAPPM = 01
0: CAPPM = 00
8: CAPPS = 01
0: CAPPS = 00
Preliminary Data Sheet
Micronas
I²C Bus