SDA9410-B13 MICRONAS [Micronas], SDA9410-B13 Datasheet - Page 54
SDA9410-B13
Manufacturer Part Number
SDA9410-B13
Description
Display Processor and Scan Rate Converter using Embedded DRAM Technology Units
Manufacturer
MICRONAS [Micronas]
Datasheet
1.SDA9410-B13.pdf
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SDA9410
Table 37
In SRC operation mode the capacity to store 2 fields of the luminance and chrominance
components of the master channel is supplied (4:1:1 or 4:2:0 format, I²C Bus parameter
CHRFORM/CHRFORS, 12h/34h).
Table 38
The Figure 25 shows the differences between the 4:1:1, 4:2:2 and 4:2:0 data format.
54
MEMOP
00
01
10
11
Definition of MEMOP
Definition of CHRFORM/CHRFORS
CHRFORM
00
01
1X
CHRFORS
0
1
Memory operation mode
SRC-Mode (Sample Rate Conversion)
SSC-Mode (Split screen)
MUP-Mode (Multi picture)
not defined
Application modes and memory concept
Data format
4:1:1
4:2:0
reserved
Data format
4:1:1
4:2:0
Preliminary Data Sheet
Micronas
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