SDA9410-B13 MICRONAS [Micronas], SDA9410-B13 Datasheet - Page 64
SDA9410-B13
Manufacturer Part Number
SDA9410-B13
Description
Display Processor and Scan Rate Converter using Embedded DRAM Technology Units
Manufacturer
MICRONAS [Micronas]
Datasheet
1.SDA9410-B13.pdf
(179 pages)
- Current page: 64 of 179
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SDA9410
Figure 27
Table 56
* Step 2a may be left out
64
Steps MEM-
1
2
2a*
3
4
5
SSC-Mode, AABB (A+B):
-master picure becomes smaller
-slave picture becomes larger
M
OP
00
00
00
00
00
01
ORG-
MEMM
1
1
1
0
0
0
Changing picture sizes to get a double window display
Switching from SRC PIP mode to SSC mode
ORG-
MEMS
1
1
1
1
1
1
S
MEM-
WRM
0
0
0
0
0
1
MEM-
WRS
0
0
0
1
1
0
Application modes and memory concept
SSC-Mode: Double Window, AABB (A+B)
M
MEM-
RDS
0
0
0
0
1
X
MEM-
RDM
0
0
1
X
X
X
Operation
SRC mode with 1/9 PIP insertion
a field based up conversion mode
must be programmed by
STOPMOM and STOPMOS
only one field is read for master
channel (reduced vertical
resolution)
memory capacity of master
channel is reduced to 1 field
memory organization of slave
channel is prepared for SSC
configuration
slave channel reading is switched
to SSC memory configuration
SSC mode: full size master
picture, 1/9 size of slave picture
S
Preliminary Data Sheet
Micronas
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