SDA9410-B13 MICRONAS [Micronas], SDA9410-B13 Datasheet - Page 33
SDA9410-B13
Manufacturer Part Number
SDA9410-B13
Description
Display Processor and Scan Rate Converter using Embedded DRAM Technology Units
Manufacturer
MICRONAS [Micronas]
Datasheet
1.SDA9410-B13.pdf
(179 pages)
- Current page: 33 of 179
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SDA9410
5.4.2.1
The overall reduction of the vertical compression block can be calculated by the formula:
The user must specify the vertical input picture size (defined by I²C Bus parameter
ALPFIPM/ALPFIPS) and the vertical output picture size (defined by I²C Bus parameter
APPLM/APPLS) as well as the I²C Bus parameter INTVM/INTVS (I²C Bus parameter,
09h,0Ah,2Bh,2Ch) and DEZVM/DEZVS (I²C Bus parameter, 0Ah,2Ch), which can be
calculated with the algorithm listed below (C-code).
intV, dezV: variables
for( intV=2*ALPFM/S, dezV=1; intV<=2*ALPFIPM/S; intV*=2, dezV*=2 )
intV = ((512*2*ALPFIPM/S*2+intV/2)/intV);
dezV/=2;
if(dezV>16)
{
}
INTVM/S=intV-512;
33
;
intV=intV*dezV/16;
dezV=16;
Vertical compression and peaking
---------------------------------------- -
Ε
512
+
512
INTVM
Φ
--------------------- -
DEZVM
1
Input signal processing
Preliminary Data Sheet
Micronas
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