SDA9410-B13 MICRONAS [Micronas], SDA9410-B13 Datasheet - Page 84

• Manufacturer Part Number: SDA9410-B13
• Description: Display Processor and Scan Rate Converter using Embedded DRAM Technology Units
• Manufacturer: MICRONAS [Micronas]

SDA9410
Figure 39
The interlaced input signal (e.g. 50 Hz PAL or 60 Hz NTSC) is composed of a field A (odd
lines) and a field B (even lines).
A
B
The field information describes the picture content. The output signal, which could
contain different picture contents (e.g. field A, field B) can be displayed with the display
line-scanning pattern ∼ or ϒ .
(A
(A
84
n
n
n
n
- Input signal, field A at time n,
- Input signal, field B at time n
, ∼ ) - Output signal, field A at time n, displayed as line-scanning pattern ∼Ι
, ϒ ) - Output signal, field A at time n, displayed as line-scanning pattern ϒΙ
FRAME
Content of picture
Explanation of field and display line-scanning pattern
Tube, Display raster
DISPLAY LINE-SCANNING PATTERN
TV
even lines
odd lines
FRAME/FIELD
Display raster
Output sync controller (OSCM/S)
Display line-scanning
pattern ϒ
odd lines
even lines
Preliminary Data Sheet
FIELD A
FIELD B
Display line-scanning
pattern ∼
Micronas