S1D1 Epson Electronics America, Inc., S1D1 Datasheet - Page 237

• Manufacturer Part Number: S1D1
• Description: LCD Controller-driver With Built-in Character ROM
• Manufacturer: Epson Electronics America, Inc.

S1D15600/601/602 Series
(1) Display ON/OFF
Alternatively turns the display ON and OFF.
Note
D = 0 Display OFF
D = 1 Display ON
(2) Display Start Line Set
Loads the RAM line address of the initial display line,
COM0, into the initial display line register. The RAM
display data becomes the top line of the LCD screen. It
is followed by the higher number lines in ascending
order, corresponding to the duty cycle. The screen can be
scrolled using this command by incrementing the line
address.
(3) Page Address Set
Loads the RAM page address from the microprocessor
into the page address register. A page address, along with
a column address, defines a RAM location for writing or
reading display data. When the page address is changed,
the display status is not affected.
Page address 8 is a special use RAM area for the indica-
tor. Only D0 is available for data exchange.
7–42
A
A
A
0
0
0
A5
0
0
0
0
0
0
1
1
RD WR
RD WR
RD WR
E
1
E
1
E
1
A4
0
0
0
1
1
R/W
R/W
R/W
0
0
0
D
D
A3
D
1
0
0
0
0
1
1
1
7
7
7
D
D
D
0
1
0
6
6
6
A2
0
0
0
1
1
D
D
A5 A4 A3 A2 A1 A0
D
1
1
5
5
5
A1
0
0
1
1
1
D
D
D
0
1
4
4
4
D
D
D
A3 A2 A1 A0
1
A0
0
1
0
0
1
3
3
3
D
D
D
1
Line address
2
2
2
D
D
D
1
62
63
0
1
2
1
1
1
D
D
D
D
0
0
0
EPSON
(4) Column Address Set
Loads the RAM column address from the microproces-
sor into the column address register. The column address
is divided into two parts-4 high-order bits and 4 low-
order bits.
When the microprocessor reads or writes display data to
or from RAM, column addresses are automatically
incremented, starting with the address stored in the
column address register and ending with address 166.
The page address is not incremented automatically.
(5) Status read
Indicates to the microprocessor the four S1D15600 status
conditions.
A
A
A7 A6 A5 A4 A3 A2 A1 A0
A
0
0
0
0
0
1
0
0
0
A3
0
0
0
0
0
0
0
0
1
RD WR
RD WR
RD WR
E
E
1
1
E
0
0
0
0
R/W
R/W
R/W
0
0
1 Busy ADC
0
0
1
A2
0
0
0
0
1
1
1
1
0
D
D
D
0
0
0
0
0
7
7
7
D
D
D
0
0
0
0
0
6
6
6
A1
OFF ET
ON/ RES-
D
D
0
0
1
1
0
0
1
1
0
D
0
0
0
0
1
5
5
5
D
D
D
1
0
0
0
0
4
4
4
A7 A6 A5 A4
A3 A2 A1 A0
D
D
D
A0
0
0
1
0
1
0
1
0
1
0
0
1
1
3
3
3
Column address
D
D
D
0
2
2
2
Rev. 4.6
165
D
D
Page
D
0
1
0
1
1
1
0
1
2
3
4
5
6
7
8
D
D
D
0
0
0
0