S1D1 Epson Electronics America, Inc., S1D1 Datasheet
S1D1
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S1D1 Summary of contents
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... MF424 - 21 IEEE1394 Controller LCD driver with RAM S1R75801F00A S1D15000 Series Technical Manual Technical Manual ...
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NOTICE No parts of this material may be reproduced or duplicated in any form or by any means without the written permission of Seiko Epson. Seiko Epson reserves the right to make changes to this material without notice. Seiko Epson ...
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... Starting April 1, 2001 the product number will be changed as listed below. To order from April 1, 2001 please use the new product number. For further information, please contact Epson sales representative. Configuration of product number DEVICES (Example : S1D15605D00B100 15605 Comparison table between new and previous number ...
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... SED1575T S1D15705T00A 0A SED1575T S1D15705T03 3 * SED1577D S1D15707D00B 0B SED1577D S1D15707D03B 3B SED1577T S1D15707T00 0 * SED1577T S1D15707T03 3 * SED1578D S1D15708D00B 0B SED157AD S1D15710D00B 0B SED157AD S1D15710D10B AB SED157AD S1D15710D11B BB SED157AT S1D15710T00A 0A SED15A6D S1D15A06D00B 0B SED15A6D S1D15A06D01B 1B SED15A6D S1D15A06D02B 2B SED15A6T S1D15A06T00 0 * SED15B1D S1D15B01D00B 0B SED15B1D S1D15B01D01B 1B SED15B1D S1D15B01D02B 2B SED15B1T S1D15B01T00 ...
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... S1D15100 Series S1D15200 Series S1D15210 Series S1D15206 Series S1D15300 Series S1D15400 Series S1D15600/601/602 Series S1D15605 Series S1D15700 Series S1D15705 Series S1D15710 Series S1D15A06 Series S1D15B01 Series ...
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... CONTENTS Selection Guide 1. S1D15100 Series 2. S1D15200 Series 3. S1D15210 Series 4. S1D15206 Series 5. S1D15300 Series 6. S1D15400 Series 7. S1D15600/601/602 Series 8. S1D15605 Series 9. S1D15700 Series 10. S1D15705 Series 11. S1D15710 Series 12. S1D15A06 Series 13. S1D15B01 Series ...
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... S1D15000 Series Selection Guide ...
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... LCD drivers with RAM for small- and medium-sized displays S1D15000 (SED1500) series Supply voltage LCD voltage Part number range (V) range (V) S1D15100D00C * (SED1510D ) 0C 0.9 to 6.0 1.8 to 6.0 S1D15100F00C * (SED1510F ) 0C S1D15200 ***** 2.4 to 7.0 3 (SED1520 ) * ** S1D15201 ***** 2.4 to 7.0 3 (SED1521 ) * ** S1D15202 ***** 2.4 to 7.0 3 (SED1521 ) * ** S1D15206D (SED1526D ) A * S1D15206D B 3 (SED1526D ) Supply B * 2.4 to 6.0 ...
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... S1D15601T00B * (SED1561T ) 0B S1D15601T10B * (SED1561T ) AB S1D15601T26A * (SED1561T ) QA S1D15602D00A * (SED1562D ) 0A S1D15602D00B * (SED1562D ) 0B 2.4 to 6.0 6 S1D15602T00B * (SED1562T ) 0B S1D15602T26A * (SED1562T ) QA S1D15605D11B * (SED1565D ) BB S1D15605D00B * (SED1565D ) 0B S1D15605D01B * (SED1565D ) 1B S1D15605D02B * 1.8 to 5.5 4 (SED1565D ) (1/7,1/9 bias) 2B S1D15605T00A * (SED1565T ) 0A S1D15605T00B * (SED1565T ) 0B S1D15605T00C * (SED1565T ) 0C Display Duty Segment Common RAM (bits) 1/17 116 17 132 65 bit 1/3, 1/4 ...
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... BB S1D15609D00B * 1.8 to 5.5 4 (SED1569D ) (1/6,1/8 bias) 0B S1D15609T **** (SED1569T ) xx * S1D15A06D00B * (SED15A6D ) 0B 1.8 to 5.5 4 S1D15A06T00A * (SED15A6T ) 0A * S1D15B01D00B * (SED15B1D ) 0B 1.8 to 5.5 4 S1D15B01T00A * (SED15B1T ) 0A S1D15E00D00B * (SED15E0D ) 0B 1.8 to 3.6 3 S1D15E00T00A * (SED15E0T ) 0A S1D15705D00B * 3.6 to 5.5 (SED1575D ) 0B 4 S1D15705D03B * 2.4 to 3.6 (SED1575D ) 3B S1D15705T00A * 3.6 to 5.5 (SED1575T ) 0A 4 S1D15705T03A * 2.4 to 3.6 (SED1575T ) 3A S1D15707D00B * 3.6 to 5.5 (SED1577D ) 0B 4 S1D15707D03B * 2.4 to 3.6 (SED1577D ) 3B S1D15707T00A * 3.6 to 5.5 (SED1577T ...
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... S1D15100 Series Rev. 1.0 ...
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... DESCRIPTION ................................................................................................................................................ 1-1 2. FEATURES ...................................................................................................................................................... 1-1 3. BLOCK DIAGRAM .......................................................................................................................................... 1-1 4. PAD LAYOUT AND COORDINATES .............................................................................................................. 1-2 5. PIN LAYOUT (S1D1500F00C * 6. PIN DESCRIPTION ......................................................................................................................................... 1-3 7. FUNCTIONAL DESCRIPTION ........................................................................................................................ 1-4 8. COMMANDS ................................................................................................................................................... 1-7 9. THE SUPPLY VOLTAGES .............................................................................................................................. 1-8 10. ABSOLUTE MAXIMUM RATINGS .................................................................................................................. 1-9 11. DC ELECTRICAL CHARACTERISTICS ......................................................................................................... 1-9 12. AC ELECTRICAL CHARACTERISTICS ........................................................................................................ 1-10 Contents ) ..................................................................................................................... 1-3 – i – Rev. 1.0 ...
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... DESCRIPTION The S1D15100Series is a segment driver IC for 1/4-duty LCD panels. It features 150 W maximum power dissipation and a wide operating supply voltage range, making it ideal for use in battery-powered devices. The S1D15100 series incorporates an LCD driving power circuit and allows simple configuration of the interface with a microcomputer, achieving a handy type unit at low cost ...
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... S1D15100 Series 4. PAD LAYOUT AND COORDINATES (S1D15100D00C ) * 2500 D1510D Chip size: 2500 m Chip pitch: 525 m Pad center coordinates No. Pin name X coordinate Y coordinate 1 OSC1 -898 2 OSC2 -738 3 V1 -578 4 V2 -418 5 V3 -258 ...
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... Identification of SI input as data or command (in case of S1D15100F00C only). The LOW level indicates data, and the * HIGH level does commands. Chip select signal input (in case of S1D15100F00C When CS input is changed from the HIGH level to the LOW level, S1D15100F00C can accept SI inputs. * The CK counter is set to the initial state when the CS input is changed from the HIGH level to the LOW level ...
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... C/D input. It displays display data when C/D input is LOW level or command data when the input is HIGH level. S1D15100 Serise reads and identifies C/D input at the timing on the rising edge of 8xn of shift clock input (CK input) from the CS = LOW level. (n= ...) ...
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... Address Counter The address counter is a presettable type to give 5-bit addresses to the display data memory. In case of S1D15100 Serise, any address can be set when the address set command is used. In case of S1D15100 Serise, set addresses are automatically incremented by 2 when an 8-bit display data is stored (C/D = LOW level), or incremented by 1 when a 4-bit data is stored by the display data memory rewrite command ...
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... S1D15100 Series Segment and Common Drivers The 32 segment drivers and the four common drivers are 4-level outputs that switch between V and V3 LCD driver voltage levels. The output states are determined by the display data values and the common counter as shown in the follow- ing figure ...
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... Note: = don’t care 30 31 Reset Reset the S1D15100F00C then enters normal operating mode, and the display turns OFF Note: = don’t care EPSON S1D15100 Series Bit 3 Bit Address = n . The S1D15100F00C * * 0 1–7 ...
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... S1D15100 Series 9. SUPPLY VOLTAGES In addition there are three LCD supply voltages and supplied externally, whereas are generated internally the following equations – 1/ LCD – 2/ LCD – LCD where V is the LCD drive voltage ...
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... V, R =680 MHz –5 0 –0 0 EPSON S1D15100 Series Rating Unit Min. Typ. Max. –6.0 — –0.9 V — 1/3 V3 — — 2/3 V3 — V –6.0 — –1.8 — 0.05 1.0 A — ...
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... S1D15100 Series 12. AC ELECTRICAL CHARACTERISTICS –5.0 0 – Parameter CK period CK LOW-level pulsewidth CK HIGH-level pulsewidth setup time hold time CS LOW-level puisewidth CS HIGH-level pulsewidth setup time hold time C setup time CK to C/D hold time Rise time ...
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... Timing Chart CS t DW2 CK t PWL1 t DW1 SI C/D Timing measurement Rev. 1.0 t PWL2 t CYC t PWH1 DH1 t DW3 0.2V 0. 0.8V 0. EPSON S1D15100 Series t PWH2 t DH2 t DH3 1–11 ...
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... S1D15200 Series Rev. 1.1 ...
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DESCRIPTION ................................................................................................................................................2-1 2. FEATURES ......................................................................................................................................................2-1 3. BLOCK DIAGRAM ........................................................................................................................................... 2-2 4. PIN LAYOUT ................................................................................................................................................... 2-3 5. PAD .................................................................................................................................................................2-4 6. PIN DESCRIPTION ......................................................................................................................................... 2-6 7. FUNCTION DESCRIPTION .............................................................................................................................2-8 8. COMMANDS ................................................................................................................................................. 2-14 9. ABSOLUTE MAXIMUM RATINGS ................................................................................................................ 2-20 10. ELECTRICAL ...
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... LCD displays for compact, low power systems. • The S1D15200 which is able to drive two lines of twelve characters each. • The S1D15201 which is able to drive 80 segments for extention. • The S1D15202 which is able to drive one line of thirteen characters each. Line-up Clock Frequency Product Name ...
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... S1D15200 Series 3. BLOCK DIAGRAM An example of S1D15200 * Common counter CL FR 2–2 10A : * LCD drive circuit Display data latch circuit Display data RAM (2560-bit) Column address decoder Display timing Column address counter generator circuit Column address register Command decoder MPU interface EPSON Status ...
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... S1D15201F00A CS * S1D15202F00A OSC1 OSC2 * S1D15200F10A CS * S1D15201F10A CS * S1D15202F10A CS * S1D15200: Common outputs COM0 to COM15 of the master LSI correspond to COM31 to COM16 of the slave LSI. S1D15202: Common outputs COM0 to COM15 of the master LSI correspond to COM15 to COM8 of the slave LSI. Rev. 1 ...
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... Pad Layout Chip specifications of AL pad package Chip size: 4.80 7.04 0.400 mm Pad pitch: 100 100 m 100 Note: An example of S1D15200D10A package. 2–4 Chip specifications of gold bump package Chip size: Bump pitch: 199 m (Min.) Bump height: 22.5 m (Typ.) Bump size ...
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... SEG42 159 482 31 SEG41 504 159 32 SEG40 704 159 33 SEG39 903 159 34 SEG38 1103 159 The other S1D15200 series packages have the different pin names as shown. Package/Pad No. 74 S1D15200D00 OSC1 ** S1D15202D00 OSC1 ** S1D15202D10 OSC1 ** S1D15201D00 CS ** S1D15201D10 CS ** Rev. 1.1 Pad Pin ...
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... S1D15200 Series 6. PIN DESCRIPTION (1) Power Supply Pins Name V Connected to the +5Vdc power. Common to the Vdc pin connected to the system ground Multi-level power supplies for LCD driving. The voltage determined for each liquid crystal cell is divided by resistance converted in impedance by the op amp, and supplied ...
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... LSI has the reverse common output scan sequence than the master LSI. M/S Input. The master or slave LSI operation select pin for the S1D15200 or S1D15202. Connected to V slave LSI operation mode). When this M/S pin is set, the functions of FR, COM0 to COM15, OSC1 (CS), and OSC2 (CL) pins are changed ...
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... RAM are moved into the latch. 2–8 signal level after reset (see Table 1). When the CS signal is high, the S1D15200 series is disconnected from the MPU bus and set to stand by. However, the reset signal is entered regardless of the internal setup status. ...
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... Bus hold (2) Busy flag When the Busy flag is logical 1, the S1D15200 series is executing its internal operations. Any command other than Status Read is rejected during this time. The Busy flag is output at pin D7 by the Status Read command appropriate cycle time (tcyc) is given, this flag needs ...
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... B drive) and to lock the line counter and common timing generator to the system frame rate used to lock the line counter to the system line scan rate system uses both S1D15200 or S1D15202 and S1D15201 they must have the same CL frequency rating. EPSON ...
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... A low power-consumption CR oscillator for adjusting the oscillation frequency using Rf oscillation resistor only. This circuit generates a display timing signal. Some of S1D15200 and S1D15202 series models have a built-in oscillator and others use an external clock. This difference must be checked before use. Connect the Rf oscillation resistor as follows. To sup- ...
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... S1D15200 Series Column address ADC = "1" "0" D SEG pin 0 0 SEG 2–12 Display area Figure 2 Display Data RAM Addressing EPSON Rev. 1.1 ...
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... COM9 COM10 COM11 COM12 COM13 COM14 COM15 Figure 4 LCD drive waveforms example Rev. 1 COM0 COM1 COM2 SEG0 SEG1 COM0—SEG0 COM0—SEG1 EPSON S1D15200 Series ...
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... S1D15200 Series 8. COMMANDS Command (1) Display On/OFF (2) Display start line (3) Set page address (4) Set column (segment) address (5) Read status (6) Write display data (7) Read display data (8) Select ADC ...
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... Command Description Table 3 is the command table. The S1D15200 series identifies a data bus using a combination of A0 and R/W (RD or WR) signals. As the MPU translates a command in the internal timing only (independent from the external clock), its speed is very high. The busy check is usually not required. ...
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... S1D15200 Series (4) Set Column Address This command specifies a column address of the display data RAM. When the display data RAM is accessed by the MPU continuously, the column address is incremented by 1 each time it is accessed from the set address. Therefore, the MPU can access to data continuously. The column address stops to be incremented at address 80, and the page address is not changed continuously ...
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... This command sets the duty cycle of the LCD drive and is only valid for the S1D15200F and S1D15202F invalid for the S1D15201F which performs passive operation. The duty cycle of the S1D15201F is determined by the externally generated FR signal. S1D15200 S1D15202 D=1: ...
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... S1D15200 Series (11) Read-Modify-Write R This command defeats column address register auto-increment after data reads. The current conetents of the column address register are saved. This mode remains active until an End command is received. • Operation sequence during cursor display When the End command is entered, the column address is returned to the one used during input of Read-Modify-Write command ...
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... After the panel size has been determined, reduce the resistance to the level where the display quality is not affected and reduce the power consumption using the divider resistor. Rev. 1 SSH EPSON S1D15200 Series E2H level. DD S1D15200 2–19 ...
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... S1D15200 Series 9. ABSOLUTE MAXIMUS RATINGS Parameter Supply voltage (1) Supply voltage (2) Supply voltage (3) Input voltage Output voltage Power dissipation Operating temperature Storage temperature Soldering temperature time at lead Notes: 1. All voltages are specified relative The following relation must be always hold ...
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... Does not include transient currents due to stray and panel capacitances 15. tR (Reset time) represents the time from the RES signal edge to the completion of reset of the internal circuit. Therefore, the S1D15200 series enters the normal operation status after this t Rev. 1.1 Condition Min. ...
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... Relationship between oscillation frequency, frames and Rf (S1D15200F00A ), (S1D15202F00A * =- =- 0.5 1.0 Rf Figure 5 (a) • Relationship between external clocks (f (S1D15200F10A ) , (S1D15202F10A * 200 100 *10 • Operating voltage range of V 2–22 and R , and operating bounds Ta= =-5V SS 200 100 1.5 2.0 2 ...
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... CL = 100 pF 10 — — Rating Condition Min. 20 — 40 2000 — 400 160 — 20 — 100 pF 20 — — EPSON S1D15200 Series t AH8 t OH8 Unit Signal Max. — ns A0, CS — ns — ns WR, RD — ns — ns — ...
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... S1D15200 Series • MPU Bus Read/Write II (68-family MPU) E R/W A0, (WRITE (READ – ˚ – unless stated otherwise SS Parameter Symbol System cycle time t CYC6 Address setup time t AW6 Address hold time t Data setup time t Data hold time t DH6 ...
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... WHCL Rise time t r Fall time delay time t DFR Note: The listed input t applies to the S1D15200 and S1D15201 and S1D15202 in slave mode. DFR Output Ta = – –5.0 V 10% unless stated otherwise SS Parameter Symbol FR delay time t DFR V = –2.7 to –4 –20 to +75 C ...
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... MPU RES GND 68 Family MPU (Reference A15 MPU GND * Refer to the figure above as to S1D15201. * S1D15200 00 (internal osillating) does not have CS terminal. Input OR output with CS signal to AD. RD( WR(R/W)terminals as the figure belew. 2–26 Decoder RESET A0 Decoder VMA ...
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... M/S OSC1 Rev. 1 S1D15200F00A * FR OSC1 * * * FR External clock (See note LCD SEG * Master OSC2 FR OSC1 EPSON S1D15200 Series To LCD SEG To LCD COM * Slave M OSC2 FR To LCD SEG To LCD COM S1D15200F10A * Slave M LCD SEG S1D15201F00A * Slave OSC2 FR 2–27 ...
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... S1D15200 Series S1D15200F10A –S1D15201F10A * To LCD COM V DD M/S Notes: 1. The duty cycle of the slave must be the same as that for the master system has two or more slave drivers a CMOS buffer will be required. 2– LCD SEG S1D15200F10A * CL FR External clock EPSON To LCD SEG ...
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... COM 1/32 duty: • 33 characters 4 lines SEG S1D15200F COM * The S1D15201F can be omitted (the 32 122-dot display mode is selected). Note: A combination of 10B or 10A * external clocks) is NOT allowed. Rev. 1.1 1 LCD SEG S1D15200F COM ...
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... S1D15200 Series Package Dimensions • Plastic QFP5–100 pin Dimensions: inches (mm) 81 100 • Plastic QFP15–100 pin 2–30 0.016 1.008 0.4 (25.6 ) 0.004 0.1 0.787 ( Index 0.004 0.026 1 0.1 (0.65 ) 0.012 (0.30 0.016 0.4 0.630 (16.0 ) 0.004 0.1 0.551 (14 Index 100 1 25 0.004 0.004 0.020 0.007 0.1 0.1 (0.5 ) (0.18 ) ...
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... TCP Dimensions Rev. 1.1 area) marking (Mold, EPSON S1D15200 Series 2–31 ...
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... S1D15210 Series Rev. 1.1 ...
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DESCRIPTION ................................................................................................................................................ 3-1 2. FEATURES ...................................................................................................................................................... 3-1 3. BLOCK DIAGRAM ........................................................................................................................................... 3-2 4. PAD LAYOUT .................................................................................................................................................. 3-3 5. PAD CENTER COORDINATES ...................................................................................................................... 3-4 6. PIN DISCRIPTION........................................................................................................................................... 3-5 7. FUNCTION DESCRIPTION ............................................................................................................................. 3-7 8. COMMANDS .................................................................................................................................................3-12 9. ABSOLUTE MAXIMUM RATINGS ...
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... DESCRIPTION The S1D15210 Series of dot matrix LCD drivers are designed for the display of characters and graphics. The drivers generate LCD drive signals derived from bit mapped data stored in an internal RAM. The S1D15210 Series drivers incorporate innovative circuit design strategies to achieve very low power dissipation at a wide range of operating voltages ...
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... S1D15210 Series 3. BLOCK DIAGRAM 3–2 LCD drive circuit Display data latch circuit Display data RAM (2560-bit) Column address decoder Display timing Column address counter generator circuit Column address register Command decoder MPU interface EPSON Status ...
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... PAD LAYOUT (1) Al-pad chip Chip size : 4.80 7.04 0.400 mm Pad pitch (Typ.) : 100 100 m 100 Rev. 1.1 (2)Au-bump chip Bump size : Bump height : 22 ( 4.80 mm EPSON S1D15210 Series 3–3 ...
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... S1D15210 Series 5. PAD CENTER COORDINATES Pad Pin X Y No. Name 1 SEG71 159 6507 2 SEG70 159 6308 3 SEG69 159 6108 4 SEG68 159 5909 5 SEG67 159 5709 6 SEG66 159 5510 7 SEG65 159 5310 8 SEG64 159 5111 9 SEG63 159 4911 10 SEG62 159 4712 11 SEG61 159 ...
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... Used as an enable clock input of the 68-series MPU. • If the 80-series MPU is connected: Input. Active low. The RD signal of the 80-series MPU is entered in this pin. When this signal is kept low, the S1D15210 data bus is in the output status. R/W (WR) • If the 68-series MPU is connected: WR (R/W) Input ...
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... S1D15210 Series (3) LCD Drive Circuit Signals Name CL Input. Effective for an external clock operation model only. This is a display data latch signal to count up the line counter and common counter at each signal falling and rising edges. FR Input. This is an input pin of LCD AC signals, and connected to the FR pin of common driver ...
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... RES signal input level MPU type Active 80-series Active 68-series Data transfer The S1D15210 drivers use the A0, E (or RD) and R/W (or WR) signals to transfer data between the system MPU and internal registers. The combinations used are given in the table blow. Common 80 MPU A0 ...
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... Bus hold (2) Busy flag When the Busy flag is logical 1, the S1D15200 series is executing its internal operations. Any command other than Status Read is rejected during this time. The Busy flag is output at pin D7 by the Status Read command appropriate cycle time (tcyc) is given, this flag needs ...
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... Column address ADC D = "1" "0" SEG pin 0 0 SEG Figure 2 Display Data RAM Addressing Rev. 1.1 Display area EPSON S1D15210 Series 3–9 ...
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... MPU, and the the 68-system MPU. RES input causes initialization of S1D15210, and initialization of the MPU is performed at the same time. Failure of initialization by the RES terminal upon applying power may lead to a status that cannot be released. ...
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... COM0 COM1 COM2 COM3 COM4 COM5 COM6 COM7 COM8 COM9 COM10 COM11 COM12 COM13 COM14 COM15 * The S1D15210 doesn't have pins Figure 4 LCD drive waveforms example Rev. 1 COM0 COM1 COM2 SEG0 SEG1 COM0—SEG0 COM0— ...
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... S1D15210 Series 8. COMMANDS Command (1)Display On/OFF (2)Display start line (3)Set page address (4) Set column (segment) address (5) Read status (6) Write display data (7) Read display data (8) Select ADC (9) All-display ...
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... Table 3 is the command table. The S1D15210 identifies a data bus using a combination of A0 and R/W (RD or WR) signals. As the MPU translates a command in the internal timing only (independent from the external clock), its speed is very high. The busy check is usually not required. (1) Display ON/OFF ...
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... S1D15210 Series (4) Set Column Address This command specifies a column address of the display data RAM. When the display data RAM is accessed by the MPU continuously, the column address is incremented by 1 each time it is accessed from the set address. Therefore, the MPU can access to data continuously. The column address stops to be incremented at address 80, and the page address is not changed continuously ...
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... D=0: All display off Rev. 1 Read data EPSON S1D15210 Series A0H, A1H A4H, A5H 3–15 ...
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... S1D15210 Series (10) Read-Modify-Write (E) (R/ This command defeats column address register auto-increment after data reads. The current conetents of the column address register are saved. This mode remains active until an End command is received. • Operation sequence during cursor display When the End command is entered, the column address is returned to the one used during input of Read-Modify-Write command ...
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... Power Save signal. Power save signal V SS Rev. 1 EPSON S1D15210 Series E2H level. DD S1D15210 3–17 ...
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... S1D15210 Series 9. ABSOLUTE MAXIMUM RATINGS Parameter Supply voltage (1) Supply voltage (2) Supply voltage (3) Input voltage Output voltage Operating temperature Storage temperature Notes: 1. All voltages are specified relative The following relation must be always hold Exceeding the absolute maximum ratings may cause permanent damage to the device. Functional operation under these conditions is not implied ...
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... MHz — and V Systems DD C5 Range of Operation 2 [ and FR terminals. L terminals These are defined within the range of the C3 C2 EPSON S1D15210 Series Rating Unit Applicable Pin Typ. Max. 0.01 1 2.0 5 1.5 4 300 500 V ...
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... S1D15210 Series Timing Characteristics • System Bus Read/Write Characteristic 1 (80-system MPU (Write (Read) Parameter Address hold time Address set-up time System cycle time Control pulse Write width Read Data set-up time Data hold time RD access time Output disable time ...
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... Symbol Condition t — CYC6 — AW6 t AH6 t — DS6 t DH6 100 pF OH6 t ACC6 E t — EW EPSON S1D15210 Series t AH6 t t DS6 DH6 t OH6 = 5 – Min. Max. Unit 1000 — — — — — ...
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... S1D15210 Series • Display Control Input Timing CL FR Parameter Signal Low-level pulse width High-level pulse width CL Rise time Fall time FR delay time FR Parameter Signal Low-level pulse width Highlevel pulse width CL Rise time Fall time FR delay time FR Note: All timings are defined based on the standards of 20% and 80 3– ...
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... Under resetting (V DD Symbol Condition Min 1.0 RW6 (V DD Symbol Condition Min 2.0 RW6 EPSON S1D15210 Series Reset completed = 5 – Typ. Max. Unit — — s — — 2 4 – Typ. Max. Unit — — s — — Reset completed = 5 ...
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... The reset input for 80-system MPU interface of S1D15210 is the opposite phase of that for the reset input of S1C88316. 3 For the reset input of S1D15210, we recommend that you use the output port of S1C88316 and send the reset signals through software. EXAMPLE OF CONNECTIONS TO LIQUID CRYSTAL PANEL COM 3– ...
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... S1D15206 Series Rev. 3.5 ...
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... DESCRIPTION ................................................................................................................................................ 4-1 2. FEATURES ...................................................................................................................................................... 4-1 3. BLOCK DIAGRAM (S1D15206 4. PIN LAYOUT ................................................................................................................................................... 4-3 5. PIN DESCRIPTION ......................................................................................................................................... 4-6 6. FUNCTION DESCRIPTION ............................................................................................................................. 4-8 7. COMMANDS .................................................................................................................................................4-18 8. ABSOLUTE MAXIMUM RATINGS ................................................................................................................ 4-22 9. ELECTRICAL CHARACTERISTICS ..............................................................................................................4-23 10. EXTERNAL WIRINGS ................................................................................................................................... 4-32 11. DIMENSIONS ................................................................................................................................................4-37 Contents 00 ) ............................................................................................................ 4 – i – Rev. 3.5 ...
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... REG Temperature gradient: 0.00 COMS pin positions Refer to No. P3 (Package pin layout), No. P4 (PAD layout) and No. P5 (PAD coordinates). An S1D15206 series package has one of following subcodes according to its package type (an example of S1D15206): S1D15206F **** : 128-pin QFP5 flat package ...
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... S1D15206 Series 3. BLOCK DIAGRAM (S1D15206 CAP1+ CAP1– CAP2+ CAP2– Power circuit V OUT Page address register Bus holder Microprocessor interface SR2 SR1 WR RD CS2 CS1 A0 4– SEG0 ····························· ...
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... SEG69 (COM10) SEG70 (COM 9) 120 SEG71 (COM 8) SEG72 (COM 7) SEG73 (COM 6) SEG74 (COM 5) SEG75 (COM 4) SEG76 (COM 3) SEG77 (COM 2) SEG78 (COM 1) 128 SEG79 (COM 0) Pin name apply to S1D15208. * Pin name apply to S1D15206D10 ** * Rev.3.5 Index (CMOS Pin=Type B). EPSON S1D15206 Series SEG15 64 SEG14 ...
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... SEG76 (COM3) SEG77 (COM2) SEG78 (COM1) SEG79 (COM0) 128 1 * Pin names apply to S1D15208. * Pin names apply to S1D15206D10 Al- pad chip • Chip size 5.92 mm 4.68 mm • Chip thickness0.4 mm • Pad opening 90.2 m 90.2 m • Pad pitch 130 m (Min) Au- bump chip (reference) • Chip size 5.92 mm 4.68 mm • ...
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... SEG2 52 SEG3 53 SEG4 54 SEG5 55 SEG6 56 SEG7 57 SEG8 58 SEG9 59 SEG10 60 SEG11 61 SEG12 62 SEG13 63 SEG14 64 SEG15 * Pin names apply to S1D15208. * Pin names apply to S1D15206D10 Rev.3 PAD No. 65 SEG16 –2767 –2106 66 SEG17 –2637 67 SEG18 –2507 68 SEG19 –2377 69 SEG20 –2246 70 SEG21 –2116 –2149 71 SEG22 – ...
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... RD I • Read enable input. When interfacing to an 8080-series microprocessor (E) and when its RD is LOW, the S1D15206 series data bus output is enabled. • When interfacing to an 6800-series microprocessor and when its R/W Enable (E) is HIGH, the S1D15206 series R/W input is enabled. WR • Write enable input. When interfacing to an 8080-series microprocessor, (R/ active LOW ...
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... Indicator COMS COM8 COM16 output EPSON S1D15206 Series Number of pins 2 Number of pins can select according 80 (S1D15206 (S1D15208) of SEGn can select according 16 (S1D15206 (S1D15208) of COMn S1D15208 COM32 4–7 ...
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... MPU Interface Parallel/Serial Interface The S1D15206 series can transfer data via 8-bit bidirectional data buses via serial data input D7 (SI). The 8-bit parallel data input or serial data input, 8080/6800-series microprocessor, and reset status can select according to SR1 and SR2. ...
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... D6(SCL Chip Select Inputs The S1D15206 series can interface to microprocessor when CS1 is LOW and CS2 is HIGH. When these pins are set to any other combination are high impedance. A0, RD, and WR input are disabled. However, the reset signal is entered regardless of CS1 and CS2 setup. The internal IC status including LCD driver circuit is held until a reset signal is entered ...
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... S1D15206 Series Busy Flag The Busy flag is set when the S1D15206 series starts to operate. During operating, it accepts Read Status instruction only. The busy flag signal is output at pin D7 when Read Status is issued. If the cycle t time ( ) is correct, the microprocessor needs not to check the flag cyc before issuing a command ...
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... Signal generation to line counter and display data latch circuit The line address counter, RAM, and latch circuit of the S1D15206 series operate synchronous to the display clock (the oscillator circuit outp).mm The LCD drive signal is sent to LCD panel driver output pin SEGn. ...
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... V generated from V are explained later.) S1D15206 series can drive LCD panel using on-chip power circuit. However, the on-chip power circuit is intended to use for a small LCD panel and it is inappropriate to a large panel requiring multiple driver chips ...
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... CAP2+ and CAP2-, open CAP2+, and jumper between CAP2- and V (CAP2-). The booster receives signals from oscillator circuit and, therefore, the oscillator must be active. The following shows the boosted potential. EPSON S1D15206 Series terminal terminal — Used Used — Used ...
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... To obtain the minimum voltage of the V determine Ra using the Rb of Step (1) above The S1D15206 series have the built- current source which are constant during voltage variation. REF However, they may change due to the variation occurring in IC manufacturing and due to the temperature change as shown below. ...
Page 99
... OFF or display is ON.) Setup of power control *After approx. 200 msec Display turns ON. level signal is output at both COM and SEG terminals for approximately 200 msec. DD EPSON S1D15206 Series REG max + Rb · I REF {–2 (0.022 A/ C) and I variation. This margin REG REF ...
Page 100
... S1D15206 Series When turning off the built-in power circuit, observe the following command sequence to mainyain power save status. When turning off the built-in power supply: Display “OFF” Static drive “ON” Built-in power supply “OFF” * Precautions when installing the COG ...
Page 101
... Section for AC characteristics). The normal reset signal appears 1 microsecond after the rising edge of this signal. If the on-board LCD power circuit of the S1D15206 series is not used, both SR1 and SR2 must be low when an external LCD power is supplied. If not low, the IC chip may be destroyed by surge current ...
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... D2 1 BUSY ADC ON/OFF RESET PS 0 When high, the S1D15206 series is busy due to internal operation or reset. Any command is rejected until BUSY goes LOW. The busy check is not required if enough time is provided for each cycle. Indicates the relationship between RAM column address and segment drivers. When LOW, the display is normal and column address “ ...
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... S1D15208 1 (11) Duty+1 Increments the duty 1/8 duty is set for the S1D15206, for example incremented to 1/9 duty. If 1/16 duty is set incremented to 1/17 duty. The COMS terminal functions as COM8 or COM16. The display line of RAM area correspond- ing to page address 4, or D0, is always accessed. ...
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... Static Drive OFF is issued. If external voltage driver resistors are used to supply voltage to LCD panel, current passing through resistors must be cut off. An external power supply must be turned off if used; its voltage must be fixed to floating When the S1D15206 series is operating, the internal status ...
Page 105
... Reset 0 1 (15) Set Power Control 0 1 (16) Set Electronic Control 0 1 (17) Clock Stop 0 1 (18) Power Save – – Note: Do not use any other command, or the system malfunction may result. Rev.3.5 S1D15206 Series Command Table Code ...
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... The moisture resistance of the flat package may drop during soldering. Take care not to excessively heat the package resin during chip mounting. 4–22 Symbol V1, V2, V3 OPR T STG T SOLDER V CC GND (S1D15206 series side must always be satisfied OUT EPSON Rating –0.3 to +7.0 –0.3 to +6.0 –18 +0.3 –0 +0.3 DD –0 +0.3 ...
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... V DD ILS –0 DDQ MHz 2 5.8 kHz products of S1D15206F11 ** Conditions Min. = 5.0V, V –V = –6.0V – 3.0V, V –V = –6.0V – 5.0V, V –V = –8.0V – 3.0V, V –V = –8.0V – 5 ...
Page 108
... Dynamic current consumption (2) when the LCD built-in power supply lamp S1D15208 I ( 4– 5.8 kHz products of S1D15206F11 CL Conditions –V = –6.0V, dual boosting 5 DD –V = –6.0V, triple boosting 5 DD –V = –8.0V, dual boosting 5 DD –V = –8.0V, triple boosting ...
Page 109
... LCD current alternating cycle, but not the F cycle signals.) Rev.3.5 It shows the current consumption when a checker pattern is always written in f When not accessed, only the current consumption of I (2) occurs. DD Conditions: S1D15206 V S1D15208 S1D15208 Conditions — V reference (during triple boosting) ...
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... S1D15206 Series • Operating voltage range on V and V DD -20 -15 [V] - -7 • I measuring circuits S1D152 • Relationship between CL output frequency and temperature [KHz - ˚C ] 4– ...
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... CYC8 t WR CCLW t RD CCLR t WR CCHW t RD CCHR t DS8 t DH8 t CL=100pF ACC8 t CH8 voltage. DD EPSON S1D15206 Series t CCHW t CCHR = 5 – Min. Max. Unit 5 5 400 100 75 145 145 2 4 – Min ...
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... S1D15206 Series (2) System buses A0 CS1 (CS2="1") RD (E) WR (R/W) D0~D7 (WR1TE) D0~D7 (READ) Parameter System cycle time Address setup time WR (R/W) Address hold time Data setup time Data hold time Output disable time Access time Enable READ LOW pulse width WRITE Enable READ ...
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... SHW t 300 SLW t 250 SAS t 400 SAH t 250 SDS t 250 SDH t 160 CSS t 800 CSH voltage. DD EPSON S1D15206 Series D7 data = 5 –40 to +85 C Max. Unit 2.7 to 4.5V –40 to +85 C Max. Unit 4–29 ...
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... S1D15206 Series (4) Display control timing CL FR Parameter Signal LOW level pulse width CL HIGH level pulse width Rise time Fall time FR delay time FR Parameter Signal LOW level pulse width CL HIGH level pulse width Rise time Fall time FR delay time FR Output timing Parameter ...
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... Reset input Parameter Signal Reset time Reset LOW pulse width Reset input t Notes: 1. (reset time) represents the period from rising edge of reset input to end of internal circuit reset. The S1D15206 series can R t operate normally after . specifies the minimum pulse width of reset input. The low pulse exceeding RW 3 ...
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... S1D15206 Series 10. EXTERNAL WIRINGS Power Supply and LCD Power Circuit If a single S1D15206 series chip is used and if on-board power supply is used and not used If on-chip power supply is used V OUT CAP1+ C1 CAP1 - C1 CAP2+ C1 CAP2 - V SS S1D152 ...
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... Microprocessor Interface The S1D15206 series chips can directly connect to 8080 and 6800-series microprocessors. Also, serial interfacing requires less signal lines between them. 8080-series microprocessors Wiring example IORQ MPU RES GND Wiring example IORQ MPU ...
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... S1D15206 Series 6800-series microprocessors Wiring example A15 MPU GND Wiring example A15 MPU GND 4–34 A0 Decoder VMA E R/W RES RESET A0 Decoder VMA E R/W RES RESET EPSON SR2 CS2 CS1 S1D15206 (E) SR1 WR (R/ ...
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... Port 2 MPU Port 3 Port 4 RES GND Wiring example Port 1 Port 2 MPU Port 3 Port 4 RES GND Rev.3 CS1 CS2 RD S1D15206 WR SI (D7) SCL (D6 RESET CS1 CS2 RD S1D15206 WR SI (D7) SCL (D6 RESET EPSON S1D15206 Series SR2 SR1 SR2 SR1 4–35 ...
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... S1D15206 Series LCD Panel and Wiring Examples Single-chip configuration S1D15206 : 80 17dot S1D15206 COM 17 4–36 S1D15208 : 64 33dot SEG 80 COM 17 EPSON SEG 64 S1D15208 COM 16 Rev.3.5 ...
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... DIMENSIONS Plastic 128-Pin QFP5 Package 102 103 128 1 The package dimensions are subject to change without notice. Rev.3.5 0.4 23.6 0.1 20 Index 39 38 0.1 0.5 0.2 1.8 EPSON S1D15206 Series 4–37 ...
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... S1D15206 Series TPC shape S1D15206T (Reference drawing) 00A * This dimensional outline drawing is subject to change for improvements without prior notice 4–38 area) (Marking area) (Mold EPSON Rev.3.5 ...
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... S1D15300 Series Rev. 1.4 ...
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... DESCRIPTION ................................................................................................................................................ 5-1 2. FEATURES ...................................................................................................................................................... 5-1 3. BLOCK DIAGRAM (S1D15300D00B 4. PAD LAYOUT .................................................................................................................................................. 5-3 5. PIN DESCRIPTION ......................................................................................................................................... 5-5 6. FUNCTIONAL DESCRIPTION ........................................................................................................................ 5-8 7. COMMANDS .................................................................................................................................................5-19 8. COMMAND SETTING (For Refrence) ...........................................................................................................5-24 9. ABSOLUTE MAXIMUM RATINGS ................................................................................................................ 5-27 10. ELECTRICAL CHARACTERISTICS ..............................................................................................................5-28 11. MPU INTERFACE (For Reference) ............................................................................................................... 5-36 12. CONNECTION BETWEEN LCD DRIVERS ...................................................................................................5-37 Contents ) ........................................................................................................... 5-2 * – i – Rev. 1.4 ...
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... S1D15303D 1/17 1/5 15 S1D15304D 1/9 1/5 14 Note: The S1D15300 series has the following subcodes depending on their shapes. (The S1D15300 examples are given.) S1D15300T : TCP (The TCP subcode differs from the inherent chip subcode.) **** S1D15300D : Bear chips **** • On-chip LCD power circuit: Voltage booster, voltage regulator, voltage follower 4. • ...
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... S1D15300 Series 3. BLOCK DIAGRAM (S1D15300D00B CAP1+ CAP1– Power supply CAP2+ circuit CAP2– CAP3– V OUT V R Page address register Bus holder Microprocessor interface CS1 CS2 5– ··············································· ...
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... PAD LAYOUT S1D15300 series chips 51 52 Die No Chip Size: Pad Pitch: S1D1530 Pad Center Size: Chip Thickness: S1D1530 Bump Size: Bump Height: Chip Thickness: Rev.1.4 6.65x4.57 mm 118 m (Min.) (Al-pad chip) * 90x90 m 300 m (Al-bump chip) * 76x76 (Typ.) 625 m ...
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... S1D15300 Series Pad Center Coordinates Unit: m PAD PIN PAD PIN No. Name X Y No. Name 1 O127 2986 2142 O128 2862 O129 2738 O130 2614 O131 2490 COMS 2366 56 O10 7 FRS 2242 57 O11 8 FR 2124 58 O12 9 DYO 2006 59 O13 ...
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... V for application. Voltages should be the following relationship When the on-chip operating power circuit is on, the following voltages are given to V performed by the Set LCD Bias command. (The S1D15303 and S1D15304 are fixed to 1/5 bias.) LCD Driver Supplies Name I/O CAP1+ O DC/DC voltage converter capacitor 1 positive connection CAP1– ...
Page 130
... Test pin. Don’t connect. DOF I/O LCD blanking control input/output. When the S1D15300 series selects master/slave mode, the respective DOF pin is connected. When it is used in combination with the common driver (S1D16305), this output/ input is connected to the common driver DOFF pin. M/S = HIGH: Output M/S = LOW: Input FRS O Static drive output ...
Page 131
... Indicator COM output. When it is not used made open. Effective only with the S1D15300, S1D15302, S1D15303 and S1D15304, S1D15305 and “HZ” with the S1D15301. When multiple numbers of the S1D15300, S1D15302, S1D15303 and S1D15304, S1D15305 are used, the same COMS signal is output to both master and slave units. Rev.1.4 Description ...
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... Interface type selection The S1D15300 series can transfer data via 8-bit bi-directional data buses (D7 to D0) or via serial data input (SI). When HIGH or LOW is selected for the polarity of P/S pin, either 8-bit parallel data input or serial data input can be selected as shown in Table 1. When serial data input is selected, RAM data cannot be read out ...
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... Chip Select Inputs The S1D15300 series has two chip select pins, CS1 and CS2 and can interface to a microprocessor when CS1 is low and CS2 is high. When these pins are set to any other combination are high impedance and A0, RD and WR inputs are disabled. ...
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... The time required to transfer data is very short because the micro- processor enters corresponding to LCD common lines as shown in Figure 3. Therefore, multiple S1D15300 can easily configure a large display having the high flexibility with very few data transmission restriction. ...
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... Page Page Page 8 Page 8 is accessed during 1/65 or 1/33 duty. Figure 4 EPSON S1D15300 Series COM output COM 0 COM 1 COM 2 COM 3 COM 4 COM 5 COM 6 COM 7 COM 8 COM 9 COM10 COM11 COM12 COM13 COM14 COM15 COM16 COM17 COM18 ...
Page 136
... COM16 The COMS pin is assigned to COM32 on S1D15300 and it is assigned to COM64 on S1D15302 independent from their output status. The COMS pin of the S1D15303 is assigned to COM16 the COMS pin of the S1D15304 is assigned to COM8 and the COMS pin of the S1D15305 is assigned to COM34. Figure 5 shows the COM output pin numbers of S1D15302D00 COM31 must be replaced by COM32 to COM63 ...
Page 137
... The power supply circuit consists of a voltage booster voltage regulator, and LCD drive voltage follower. The power supply circuit built in the S1D15300 series is set for a small-scale LCD panel and is inappropriate to a large-pixel panel and a large-display-capacity LCD panel using multiple chips. As the large LCD panel has the dropped display quality due to a large load capacity, it must use an external power source ...
Page 138
... S1D15300 Series Booster circuit If capacitors C1 are inserted between CAP1+ and CAP1-, between CAP2+ and CAP2-, CAP1+ and CAP3- and VSS and VOUT, the potential between VDD and VSS is boosted to quadruple toward the negative side and it is output at VOUT. For triple boosting, remove only capacitor C1 between CAP+1 and CAP3- from the connection of quadruple boosting operation and jumper between CAP3- and VOUT ...
Page 139
... Rb/Ra –1 V REG The S1D15300 series have the built-in V REG I current source which are constant during voltage variation. REF However, they may change due to the variation occurring in IC manufacturing and due to the temperature change as shown below. Consider such variation and temperature change, and set the Ra and Rb appropriate to the LCD used ...
Page 140
... when the on-chip power circuit is used CAP3 CAP1+ CAP1- CAP2+ CAP2- V OUT V 5 S1D15300 series External V 2 power V 3 supply EPSON is input from the outside OUT (D2, D1, D0 ...
Page 141
... RES pin to the reset pin of the microprocessor and initialize the microprocessor at the same time. In case the S1D15300 series does not use the internal LCD power supply circuit, the RES must be low when the external LCD power supply is turned on. ...
Page 142
... S1D15300 Series Exemplary connection diagram COM 0 COM 1 COM 2 COM 3 COM 4 COM 5 COM 6 COM 7 COM 8 COM 9 COM 10 COM 11 COM 12 COM 13 COM 14 COM ...
Page 143
... COMMANDS The S1D15300 series uses a combination of A0, RD (E) and WR (R/ W) signals to identify data bus signals. As the chip analyzes and executes each command using internal timing clock only regardless of external clock, its processing speed is very high and its busy check is usually not required. The 8080 series microprocessor interface enters a read status when a low pulse is input to the RD pin and a write status when a low pulse is input to the WR pin ...
Page 144
... Set LCD Bias Selects a bias ratio of the voltage required for driving the LCD. This command is enabled when the voltage follower in the power supply circuit operates. (The LCD bias setting command is invalid for the S1D15303 and S1D15304. They are being fixed to the 1/5 bias.) 5–20 E ...
Page 145
... The Reset command cannot initialize LCD power supply. Only the Reset siganl to the RES pin can initialize the supplies. (15) Output Status Select Register Applicable to the S1D15300 and S1D15302. When D is high or low, the scan direction of the COM output pin is selectable. Refer to Output Status Selector Circuit in Functional Descrip- tion for details ...
Page 146
... When an external power supply is used, likewise, the function of this external power supply must be stopped so that it may be fixed to floating causing the S1D15300 series the sleep mode or standby mode. When the common driver S1D16305 or S1D16501 is combined with the S1D15301 in the configuration, the DOF pin of the S1D15301 must be connected to the DOFF pin of the S1D16305 or S1D16501 ...
Page 147
... EPSON S1D15300 Series Function Turns on LCD panel when goes 1 high, and turns off when goes low. Specifies RAM display line for COM0. Sets the display RAM page in Page Address register. Sets 4 higher bits of column address of display RAM in register ...
Page 148
... S1D15300 Series 8. COMMAND SETTING (For Refrence) Instruction Setup Examples Initial setup Note: As power is turned on, this IC outputs non-LCD-drive potentials V and V – V from COM terminal (also used for generating the LCD drive output). If charge remains on the smoothing capacitor being 1 4 inserted between the above LCD driving terminals, the display screen can be blacked out momentarily. In order to avoid this trouble recommended to employ the following powering on procedure. • ...
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... You can select either the sleep mode or standby mode for the power save mode. Refer to the “Power Save (Multiple Commands)” in the Command Description (19). Rev.1.4 power on with SS The power save mode must be turned on within 5 ms from powering on. Operations ranging from turning off of the power save mode through the power control set must be completed within 5 ms. EPSON S1D15300 Series 5–25 ...
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... S1D15300 Series • Data Display Notes: *8: Refer to the “Display Line Set” in the Command Description (2). *9: Refer to the “Page Address Set” in the Command Description (3). *10: Refer to the “Column Address Set” in the Command Description (4). *11: Refer to the “Display Data Write” in the Command Description (6). ...
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... OPR T STR (S1D15300 series must always be satisfied EPSON S1D15300 Series Rating Unit –0.3 to +7.0 –0.3 to +6.0 V –0.3 to +4.5 –18 –0 +0 –0 +0 –40 to +85 C –55 to +100 C –55 to +125 ...
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... S1D15300 Series 10. ELECTRICAL CHARACTERISTICS DC Characteristics Item Recommended Power voltage (1) Operation Operational Operating voltage Operational (2) Operational Operational HIGH-level input voltage LOW-level input voltage HIGH-level output voltage LOW-level output voltage HIGH-level input voltage LOW-level input voltage Input leakage current Output leakage current LCD driver ON resistance ...
Page 153
... V DD S1D15304 V = 3.0V Current consumption during Power Save mode Item Symbol During sleep I S1D15300, S1D15301, S1D15302 DDS1 During standby I S1D15300, S1D15301, S1D15302 DDS2 Typical current consumption characteristics (reference data) • Dynamic current consumption (1) when LCD external power mode lamp (uA) ...
Page 154
... Current that each IC unit consumes. It does not include the current of the LCD panel capacity, wiring capacity, etc. This is current consumption under the conditions of display data = checker, display ON, S1D15300 = 1/33 duty (1/6 Bias), and S1D15301 and S1D15302 = 1/65 duty. (1/8 Bias) *12 Applies to the case where the on-chip oscillator circuit is used and no access is made from the microprocessor. ...
Page 155
... V [V] DD Fig 10 This indicates current consumption when data is always 10 written on the checker pattern at fcyc. When no access is made, only IDD (1) occurs. S1D15301, 1 S1D15302 S1D15300, Condition: S1D15300/S1D15305 V S1D15303, S1D15304, S1D15305 0 0.01 0 fcyc [MHz] Fig. 11 EPSON S1D15300 Series 8 -V =-8.0V triple boosting ...
Page 156
... S1D15300 Series AC Characteristics (1) System buses A0 CS1 (CS2="1") WR,RD D0~D7 (WRITE) D0~D7 (READ) Parameter Address hold time Address setup time System cycle time Control LOW pulse width(WR) Control LOW pulse width(RD) Control HIGH pulse width (WR) Control HIGH pulse width (RD) Data setup time Data hold time ...
Page 157
... AW6 t AH6 t DS6 t DH6 t CL=100pF OH6 t ACC6 t EWHR t EWHW t EWLR t EWLW - CYC6 EWLR EWHR . DD EPSON S1D15300 Series t EWLR V = 5 – Min. Max. Unit 166 – – – – – – – ...
Page 158
... S1D15300 Series (3) Serial interface CS1 (CS2="1") A0 SCL SI Parameter Serial clock cycle Serial clock HIGH pulse width Serial clock LOW pulse width Address setup time Address hold time Data setup time Data hold time CS serial clock time Parameter Serial clock cycle ...
Page 159
... During reset Symbol Condition Min 0.5 RW Symbol Condition Min 1.0 RW DD. EPSON S1D15300 Series t DFR t DOL V = 5 – Typ. Max. Unit 100 ns 40 100 – Typ. Max. Unit 15 80 ...
Page 160
... MPU INTERFACE (For Reference) The S1D15300 series chips can directly connect to 8080 and 6800-series microprocessors. Also, serial interfacing requires less signal lines between them. When multiple chips are used in the S1D15300 series they can be connected to the microprocessor and one of them can be selected by Chip Select. ...
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... CONNECTION BETWEEN LCD DRIVERS The LCD panel display area can easily be expanded by use of multiple S1D15300 series chips. The S1D15300 series can also be connected to the common driver (S1D16305). S1D15301 to S1D16305 (S1D16305) S11D16305 DOFF DIO S1D15300 to S1D15301 V DD S1D15300 M/S (master) CL DYO S1D15302 to S1D15302 ...
Page 162
... S1D15300 : 100 33dot S1D15300D00A COM (33) S1D16700 DOFF DIO YSCL FR COM(33) M/S VDD 5–38 SEG (100) * <Master> COM (17) COM(65) 132 65 dot FR S1D15301 CL DYO DOF S1D15302 : 200 65 dot SEG(100) S1D15302 FR FR <Master> DOF DOF CL CL EPSON SEG (100) S1D15300D10A * <Master> COM (16) SEG(132) VDD M/S SEG(100) S1D15302 COM(32) < ...
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... Dimensional outline drawing of the flexible substrate (an example) The dimensions are subject to change without prior notice. area) Rev.1.4 marking (Mold, area) marking (Mold, EPSON S1D15300 Series 5–39 ...
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... S1D15400 Series Rev. 1.0 ...
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DESCRIPTION ................................................................................................................................................ 6-1 2. FEATURES ...................................................................................................................................................... 6-1 3. BLOCK DIAGRAM ........................................................................................................................................... 6-2 4. PIN LAYOUT ................................................................................................................................................... 6-3 5. PAD ................................................................................................................................................................. 6-5 6. PIN DESCRIPTION ......................................................................................................................................... 6-6 7. BLOCK DESCRIPTION ................................................................................................................................... 6-8 8. COMMANDS .................................................................................................................................................6-13 9. ABSOLUTE MAXIMUM RATINGS ................................................................................................................ ...
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... DESCRIPTION The S1D15400 is a segment LCD driver intended for use with medium size LCD panels. The driver generates LCD drive signals from data sup- plied by an MPU over a high speed, 8-bit bus, 4-bit bus and stored in its internal display RAM. The S1D15400 incorporates innovative circuit design ...
Page 167
... S1D15400 Series 3. BLOCK DIAGRAM OSC2 OSC1 FR 6–2 LCD driver circuit Common counter Display data latch circuit Display data RAM 2560bit Column address decoder Display Column address counter timing generator Column address register Command decoder MPU Interface EPSON Status Rev. 1.0 ...
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... SEG28 69 SEG3 SEG27 70 SEG2 SEG26 71 SEG1 SEG25 72 SEG0 SEG24 73 A0 SEG23 74 OSC1 SEG22 75 OSC2 Pin Duty 98 99 1/4 COM2 COM3 1/3 NC COM2 EPSON S1D15400 Series Number Name 76 E (RD) 77 R/W (WR DB0 80 DB1 81 DB2 82 DB3 83 DB4 84 DB5 85 DB6 86 DB7 RES 89 FR ...
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... S1D15400 Series Mechanical Specifications S1D15400F00A Flat Pack * Dimensions: inches (mm) 81 100 6–4 0.016 1.008 0.4 (25.6 ) 0.004 0.1 0.787 ( Index 0.004 1 0.026 0.1 (0.65 ) 0.012 0.1 (0.30 EPSON 0.004 ) 0~12 0.110 (2.8) Rev. 1.0 ...
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... PAD S1D15400D Pad Layout Al-pad chip • Die size: 4.80 mm 7.04 mm 0.525 mm • Pad size: 100 100 m Au-bump chip • Minimum bump pitch: 199 m • Bump height +10/–5 m • Bump size: 132 111 Pad Center Coordinates Pad X Y Number Name ...
Page 171
... Input activated at the HIGH level An enable clock input terminal for the MPU. <When series 80 MPU is connected> Input activated at the LOW level A terminal for RD signal from the MPU. The data bus on the S1D15400 outputs signals while the RD signal is at the LOW level. R/W(WR) <When series 68 MPU is connected> ...
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... V levels is selected COUNTER OUTPUT LEVEL MS Counter output Output level Input A terminal that selects whether the MPU operates as a master or slave of the S1D15400. It connects OSC2 terminals. M Master Slave SS M When the FR signal is used to establish synchronization between the master and slave ICs, both of them will output the same waveforms from the COM terminal ...
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... S1D15400 Series 7. BLOCK DESCRIPTION System Bus Data transfer The S1D15400 driver uses the A0, E (or RD) and R/W (or WR) signals to transfer data between the system MPU and internal registers. The combinations used are given in the table below. In order to match the timing requirements of the MPU with those of the display data RAM and control registers, all data is latched into and out of the driver ...
Page 174
... Internal timing Column address Latch Busy flag When the Busy flag is logical 1, the S1D15400 is execut- ing its internal operations. Any command other than Status Read is rejected during this time. The Busy flag is output at pin D7 by the Status Read command Rev. 1 ...
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... S1D15400 Series Display Start Line and Line Count Registers The contents of this register form a pointer to a line of data in display data RAM corresponding to the first line of the display (COM0), and are set by the “Set Display Start Line” command (see section 3). ...
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... SEG SEG (Example of duty 1/4,Display start line set to 08H.) Figure 2 Display Data RAM Addressing Rev. 1.0 Display area EPSON S1D15400 Series 6–11 ...
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... The oscillator is a low power RC oscillator whose fre- quency of oscillation is determined by the value of the feedback resistor externally generated 50% duty f cycle clock input via OSC1 slave S1D15400 is used, its OSC2 input is connected to the OSC2 output of the master driver. • Oscillator mounted V ...
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... The Power Save mode is selected if the static drive is turned ON when the display is OFF. Table 3 is the command table. The S1D15400 identifies a data bus using a combination of A0 and R/W (RD or WR) signals. As the MPU translates a command in the internal timing only (independent from the external clock), its speed is very high ...
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... S1D15400 Series (1) Display ON/OFF This command turns the display on and off. D=1: Display ON D=0: Display OFF R (2) Display Start Line This command specifies the line address shown in Figure 2 and indicates the display line that corresponds to COM0. The display area begins at the specified line address and continues in the line address increment direction. This area having the number of lines of the specified display duty is displayed ...
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... segment driver n. segment driver Write data EPSON S1D15400 Series 00H to 4FH 6–15 ...
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... S1D15400 Series (7) Read Display Data R Reads 8-bits of data from the data I/O latch, updates the contents of the I/O buffer with display data from the display data RAM location specified by the contents of the column address and page address registers and increments the column address register ...
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... Address Set command cannot be used. Sequence when the cursor is displayed Rev. 1 Page address set Column address set Read/modify/write Dummy read Data read Data write NO End of change YES End EPSON S1D15400 Series E0H 6–17 ...
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... S1D15400 Series (12) End R Column address Cancels read-modify-write mode and restores the contents of the column address register to their value prior to the receipt of the read-modify-write command. (13) Reset This command resets the display start line register, column address counter, and page address register to their initial status. ...
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... SS V –15 –0 –0 250 D T –40 to +85 opr –65 to +150 Tstg –55 to +125 T 260, 10 sol = EPSON S1D15400 Series Unit 6–19 ...
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... S1D15400 Series 10. DC CHARACTERISTICS (Ta = – Parameter Symbol Operating Recommended voltage ( See note 1. Allowable Recommended V 3 Operating Allowable voltage (2) Allowable V 1 Allowable IHT HIGH-level input voltage V IHC V ILT LOW-level input voltage V ILC V OHT HIGH-level output voltage V OHC1 ...
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... SS 800 Frame 400 [kHz] 1.5 2.0 2 OSC 200 100 0 4.0 8.0 f [kHz ] OSC 1/4 duty 1/3 duty -15 - [V] SS EPSON S1D15400 Series OSC1 OSC2 –5V SS 0.5 1.0 1.5 2.0 2 1/4 duty 1/3 duty 12.0 Operating voltage range -8 6–21 ...
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... S1D15400 Series 11. AC CHARACTERISTICS • MPU Bus Read/Write I (80-family MPU) A0,CS t AW8 WR, (WRITE (READ) (Ta = – –5.0 V 10%) SS Signal Parameters Address hold time A0, CS Address setup time System cycle time WR, RD Control pulsewidth Data setup time Data setup time ...
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... AH6 t 80 DS6 t 10 DH6 t 10 OH6 t — ACC6 Read t 100 EW Write 8 of –3.0 V are about 100 their value for EPSON S1D15400 Series t DS6 t AH6 t DH6 t OH6 Unit Condition — ns — ns — ns — ns — 100 — ...
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... DFR Rating Symbol Min. TYP. t — 0.2 DFR applies to the S1D15400 in slave mode. The listed output t of –3.0 V are about 100 their value for EPSON t r Unit Condition Max. — s — s 150 ns 150 ns 2.0 s Unit Condition Max ...
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... Example Drive Waveforms (1/3 Bias, 1/4 duty) COM0 COM1 COM2 COM3 COM4 COM5 COM6 COM7 COM14 COM15 SEG COM3 to SEGn COM0 to SEGn Rev. 1.0 FR COM0 COM1 COM2 COM3 SEGn EPSON S1D15400 Series ...
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... S1D15400 Series 12. MPU INTERFACE CONFIGURATION 80 Family MPU IOQR MPU RES GND 68 Family MPU A15 VMA MPU R/W RES GND 6–26 A0 Decoder RES RESET A0 Decoder R/W RES RESET EPSON V DD ...
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... LCD DRIVE INTERFACE CONFIGURATION S1D15400 - S1D15400 (Internal Oscillator) To LCD SEG To LCD COM S1D15400 V DD Master M/S OSC1 R f S1D15400 - S1D15400 (External clock) To LCD SEG To LCD COM S1D15400 V DD M/S OSC1 External clock Notes: 1. The duty cycle of the slave must be the same as that for the master. ...
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... S1D15400 Series 14. PANEL INTERFACE CONFIGURATION COM 6–28 LCD Segment type SEG S1D15400 S1D15400 Master Slave EPSON SEG Rev. 1.0 ...
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... S1D15600/601/602 Series Rev. 4.6 ...
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DESCRIPTION ................................................................................................................................................ 7-1 2. FEATURES ...................................................................................................................................................... 7-1 3. BLOCK DIAGRAM ........................................................................................................................................... 7-2 4. PAD ................................................................................................................................................................. 7-3 5. PIN DESCRIPTION ......................................................................................................................................... 7-5 6. ABSOLUTE MAXIMUM RATINGS .................................................................................................................. 7-9 7. FUNCTIONAL DESCRIPTION ......................................................................................................................7-21 8. COMMANDS .................................................................................................................................................7-40 9. COMMAND DISCRIPTION-INSTRUCTION SETUP EXAMPLES ...
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... RAM. The S1D15600/601/602 series features 167 common and segment outputs to drive either a 65 (S1D15600) display (4 rows 6 columns with 16 16- pixel characters 134-pixel (S1D15601) display (2 rows 8 columns with 16 16-pixel characters 150-pixel (S1D15602) display (1 row 9 columns with 16 16 characters) ...
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... S1D15600/601/602 Series 3. BLOCK DIAGRAM CAP1+ Supply CAP1– voltage generator1 CAP2+ CAP2– Output T1, T2 status select Page address register Bus holder CS1 CS2 A0 RD 7– O31 O32 to O101 O102 Common Segment ...
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... Bump size (Typ.) Bump hight : 23 m (Typ.) Pad size A : 111 m 102 m (Typ.) (Pad No 18 42, Bump size (Typ.) (Other then the above) EPSON S1D15600/601/602 Series 1 216 COM1 O165 O121 170 44 ~ 49) (other then the above 49) 7–3 ...
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... S1D15600/601/602 Series S1D15600/601/602 Series PAD Center Coordinates PAD PIN PAD X Y No. Name No. Name 1 V 3640 2487 3489 3339 3188 3037 2889 60 010 DD 7 M/S 2755 61 011 8 RES 2604 62 012 9 SCL 2453 63 013 ...
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... V 2 7 8 Description Voltage T2 Boosting circuit regulation circuit Valid Valid Valid Valid Invalid Valid Invalid Invalid EPSON S1D15600/601/602 Series Number of pins . S1D15601D * 10B * S1D15602D 00B * * Number of pins and V ...