AT32UC3C0512CAU Atmel Corporation, AT32UC3C0512CAU Datasheet - Page 815
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AT32UC3C0512CAU
Manufacturer Part Number
AT32UC3C0512CAU
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT32UC3A0128.pdf
(377 pages)
2.AT32UC3A0128.pdf
(159 pages)
3.AT32UC3A0128AU.pdf
(2 pages)
4.AT32UC3C0128C.pdf
(1313 pages)
5.AT32UC3C0128C.pdf
(108 pages)
Specifications of AT32UC3C0512CAU
Flash (kbytes)
512 Kbytes
Pin Count
144
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
123
Ext Interrupts
144
Usb Transceiver
1
Quadrature Decoder Channels
2
Usb Speed
Full Speed
Usb Interface
Device + OTG
Spi
7
Twi (i2c)
3
Uart
5
Can
2
Lin
5
Ssc
1
Ethernet
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
4
Dac Resolution (bits)
12
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
68
Self Program Memory
YES
External Bus Interface
1
Dram Memory
sdram
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0 to 3.6 or 4.5 to 5.5
Operating Voltage (vcc)
3.0 to 3.6 or 4.5 to 5.5
Fpu
Yes
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
22
Input Capture Channels
12
Pwm Channels
20
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
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- AT32UC3A0128 PDF datasheet
- AT32UC3A0128 PDF datasheet #2
- AT32UC3A0128AU PDF datasheet #3
- AT32UC3C0128C PDF datasheet #4
- AT32UC3C0128C PDF datasheet #5
- Current page: 815 of 1313
- Download datasheet (20Mb)
Table 30-4.
• TDMFS: TDM Frame Sync
Table 30-5.
• NBCHAN: Number of TDM Channels - 1
• TXSAME: Transmit Data when Underrun
• TXDMA: Single or multiple DMA Channels for Transmitter
• TXMONO: Transmit Mono
• RXLOOP: Loop-back Test Mode
• RXMONO: Receive Mono
• RXDMA: Single or multiple DMA Channels for Receiver
32117C–AVR-08/11
fs Ratio
0
1
3
3
1024 fs
256 fs
384 fs
512 fs
768 fs
TDMFS
SLOT
HALF
BIT
-
This field should be written with the number of TDM channels minus one
0: Zero sample transmitted when underrun
1: Previous sample transmitted when underrun (in I2S mode only)
0: Transmitter uses a single DMA channel for all audio channels
1: Transmitter uses one DMA channel per audio channel
0: Stereo
1: Mono, with left audio samples duplicated to right audio channel by the IISC
0: Normal mode
1: ISDO output of IISC is internally connected to ISDI input
0: Stereo
1: Mono, with left audio samples duplicated to right audio channel by the IISC
0: Receiver uses a single DMA channel for all audio channels
1: Receiver uses one DMA channel per audio channel-
2 channels
IWS pulse is high for one time slot at beginning of frame
IWS pulse is high for half the time slots at beginning of frame, i.e. half the IWS period
IWS pulse is high for one bit period at beginning of frame, i.e. one ISCK period
Reserved
Master Clock to Sampling Frequency (fs) Ratio
TDM Frame Sync
15
23
31
47
63
4 channels
11
15
23
31
7
IMCKFS
6 channels
15
7
-
-
-
Description
8 channels
11
15
3
5
7
AT32UC3C
815
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