AT32UC3C0512CAU Atmel Corporation, AT32UC3C0512CAU Datasheet - Page 1269
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AT32UC3C0512CAU
Manufacturer Part Number
AT32UC3C0512CAU
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT32UC3A0128.pdf
(377 pages)
2.AT32UC3A0128.pdf
(159 pages)
3.AT32UC3A0128AU.pdf
(2 pages)
4.AT32UC3C0128C.pdf
(1313 pages)
5.AT32UC3C0128C.pdf
(108 pages)
Specifications of AT32UC3C0512CAU
Flash (kbytes)
512 Kbytes
Pin Count
144
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
123
Ext Interrupts
144
Usb Transceiver
1
Quadrature Decoder Channels
2
Usb Speed
Full Speed
Usb Interface
Device + OTG
Spi
7
Twi (i2c)
3
Uart
5
Can
2
Lin
5
Ssc
1
Ethernet
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
4
Dac Resolution (bits)
12
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
68
Self Program Memory
YES
External Bus Interface
1
Dram Memory
sdram
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0 to 3.6 or 4.5 to 5.5
Operating Voltage (vcc)
3.0 to 3.6 or 4.5 to 5.5
Fpu
Yes
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
22
Input Capture Channels
12
Pwm Channels
20
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
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Part Number
Manufacturer
Quantity
Price
- AT32UC3A0128 PDF datasheet
- AT32UC3A0128 PDF datasheet #2
- AT32UC3A0128AU PDF datasheet #3
- AT32UC3C0128C PDF datasheet #4
- AT32UC3C0128C PDF datasheet #5
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- Download datasheet (20Mb)
40.9.3
40.9.3.1
Table 40-46. USART in SPI Mode Timing, Master Mode
Note:
32117C–AVR-08/11
Symbol
USPI0
USPI1
USPI2
USPI3
USPI4
USPI5
1. These values are based on simulation and characterization of other AVR microcontrollers manufactured in the same pro-
2. Where:
USART in SPI Mode Timing
cess technology. These values are not covered by test limits in production.
Master mode
Parameter
MISO setup time before SPCK rises
MISO hold time after SPCK rises
SPCK rising to MOSI delay
MISO setup time before SPCK falls
MISO hold time after SPCK falls
SPCK falling to MOSI delay
t
SAMPLE
Figure 40-6. USART in SPI Master Mode With (CPOL= CPHA= 0) or (CPOL= CPHA= 1)
Figure 40-7. USART in SPI Master Mode With (CPOL= 0 and CPHA= 1) or (CPOL= 1 and
=
t
SPCK
–
⎛
⎝
SPCK
SPCK
MISO
MOSI
MISO
MOSI
------------------------------------
2
×
CPHA= 0)
t
t
CLKUSART
SPCK
1
-- -
2
⎞
⎠
USPI2
USPI5
×
(1)
t
CLKUSART
Conditions
capacitor =
external
40pF
USPI0
USPI3
26+ t
26+ t
Min
SAMPLE
SAMPLE
USPI1
USPI4
0
0
(2)
(2)
AT32UC3C
Max
11.5
11
Units
ns
ns
ns
ns
ns
ns
1269
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