AT32UC3C0512CAU Atmel Corporation, AT32UC3C0512CAU Datasheet - Page 618

• Manufacturer Part Number: AT32UC3C0512CAU
• Manufacturer: Atmel Corporation

Specifications of AT32UC3C0512CAU

• Flash (kbytes): 512 Kbytes
• Pin Count: 144
• Max. Operating Frequency: 66 MHz
• Cpu: 32-bit AVR
• # Of Touch Channels: 32
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 123
• Ext Interrupts: 144
• Usb Transceiver: 1
• Quadrature Decoder Channels: 2
• Usb Speed: Full Speed
• Usb Interface: Device + OTG
• Spi: 7
• Twi (i2c): 3
• Uart: 5
• Can: 2
• Lin: 5
• Ssc: 1
• Ethernet: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 4
• Resistive Touch Screen: No
• Dac Channels: 4
• Dac Resolution (bits): 12
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 68
• Self Program Memory: YES
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0 to 3.6 or 4.5 to 5.5
• Operating Voltage (vcc): 3.0 to 3.6 or 4.5 to 5.5
• Fpu: Yes
• Mpu / Mmu: Yes / No
• Timers: 6
• Output Compare Channels: 22
• Input Capture Channels: 12
• Pwm Channels: 20
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

Figure 25-52. Master Node with Peripheral DMA Controller (PDCM=0)
25.6.12.2
Figure 25-53. Slave Node with Peripheral DMA Controller
32117C–AVR-08/11
WRITE BUFFER
WRITE BUFFER
DATA 0
DATA N
DATA 1
DATA 0
DATA N
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Slave Node Configuration
Peripheral DMA
Peripheral DMA
Controller
Controller
In this configuration, the Peripheral DMA Controller transfers only the DATA. The Identifier must
be read by the user in the LIN Identifier register (LINIR). The LIN mode must be written by the
user in the LIN Mode register (LINMR).
The WRITE buffer contains the DATA if the USART sends the response (NACT=PUBLISH).
T h e R E A D b u f f e r c o n t a i n s t h e D A T A i f t h e U S A R T r e c e i v e s t h e r e s p o n s e
(NACT=SUBSCRIBE).
IMPORTANT: if the NACT configuration for a frame is PUBLISH, the US_LINMR register, must
be write with NACT=PUBLISH even if this field is already correctly configured, that in order to set
the TXREADY flag and the corresponding Peripheral DMA Controller write transfer request.
P eripheral
TXRDY
Peripheral
bus
RXRDY
bus
NODE ACTION = PUBLISH
CONTROLLER
USART LIN
CONTROLLER
USART LIN
READ BUFFER
READ BUFFER
DA TA 0
DATA N
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DATA 0
DATA N
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Peripheral DMA
Controller
Peripheral DMA
Controller
Peripheral
TXRDY
RXRDY
bus
P eripheral
RXRDY
Bus
AT32UC3C
NODE ACTION = SUBSCRIBE
CONTROLLER
NACT = SUBSCRIBE
USART LIN
CONTROLLER
USART LIN
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