AT32UC3C0512CAU Atmel Corporation, AT32UC3C0512CAU Datasheet - Page 770

• Manufacturer Part Number: AT32UC3C0512CAU
• Manufacturer: Atmel Corporation

Specifications of AT32UC3C0512CAU

• Flash (kbytes): 512 Kbytes
• Pin Count: 144
• Max. Operating Frequency: 66 MHz
• Cpu: 32-bit AVR
• # Of Touch Channels: 32
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 123
• Ext Interrupts: 144
• Usb Transceiver: 1
• Quadrature Decoder Channels: 2
• Usb Speed: Full Speed
• Usb Interface: Device + OTG
• Spi: 7
• Twi (i2c): 3
• Uart: 5
• Can: 2
• Lin: 5
• Ssc: 1
• Ethernet: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 4
• Resistive Touch Screen: No
• Dac Channels: 4
• Dac Resolution (bits): 12
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 68
• Self Program Memory: YES
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0 to 3.6 or 4.5 to 5.5
• Operating Voltage (vcc): 3.0 to 3.6 or 4.5 to 5.5
• Fpu: Yes
• Mpu / Mmu: Yes / No
• Timers: 6
• Output Compare Channels: 22
• Input Capture Channels: 12
• Pwm Channels: 20
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

29.6.3.4
29.6.4
32117C–AVR-08/11
Message Filtering
Automatic mode
Once a MOb is enabled (by writing to MOBER), an incoming frame is compared
with every MOb enabled for reception in order to select the MOb for storing the frame. User can
check if the channel is receiving a frame by reading the CANSR.RS bit.
At the end of the successful reception, the complete message (ID + RTR + IDE + DATA bits) is
stored in RAM, the MOBESR.MENn bit is cleared and MOBSR.RXOK is set. To acknowledge
any interrupt and to free the MOb user must clear this status bit by writing a one to the associ-
ated bit in MOBSCR. The MOBSR.DLCW bit indicates if the received DLC does not correspond
to MOBCTRL.DLC. Any such status should also be cleared by user.
CAN errors detected during reception are reported in CANISR register. A corrupted message is
not stored to RAM but the selected MOb remains enabled.
User can enable/disable several MObs in one operation, by writing to MOBER/MOBDR registers
(Section
If several MObs are enabled, the MOb priority is given by the filtering order which is from low to
high MOb number.
All MObs are configured in automatic mode if the Automatic Mode (MOBCTRL.AM) bit is set.
The main configurations are:
Other configurations (IDT.RTR = 0) are possible but does not make sense.
Properties:
The filtering process uses the ID tag (IDT) and ID mask (IDM) values defined in RAM. Compari-
son is done on the bits IDENTIFIER, RTR and IDE. Messages can therefore be filtered
according to the identifier value, frame type (remote or data frame) and the format (standard or
extended).
Each received bit is compared with the corresponding bit in the ID tag only if the corresponding
bit in ID mask is set. Otherwise the received bit is considered as don’t care. The filtering result is
true if all comparisons are true.
Examples with 11 bits of identifier ( ‘-‘ means don’t care):
• DIR bit: MOb direction, 0 stands for reception
• Remote frame reception - Data frame transmission
• Remote frame transmission - Data frame reception
MOb configuration: MOBCTRL.AM = 1, MOBCTRL.DIR = 0, IDT.RTR = 1
IDT/IDM can be set to receive any identifier but transmission will be done with identifier
received.
MOb configuration: MOBCTRL.AM = 1, MOBCTRL.DIR = 1, IDT.RTR = 1
Remote frame is sent with IDT value. Reception uses current IDT value but IDM can be set to
filter data frame.
– MOb handling is identical to single configuration (priority, access,...) but:
– Bits MOBCTRL.AM and IDT.RTR are inverted at the end of first
– Bit MOBSR.TXOK (or RXOK) is only set at the end of the transmission (or reception)
reception/transmission
29.6.3.2).
AT32UC3C
(Section
29.6.4)
770