AT32UC3C0512CAU Atmel Corporation, AT32UC3C0512CAU Datasheet - Page 141

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AT32UC3C0512CAU

Manufacturer Part Number
AT32UC3C0512CAU
Description
Manufacturer
Atmel Corporation

Specifications of AT32UC3C0512CAU

Flash (kbytes)
512 Kbytes
Pin Count
144
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
123
Ext Interrupts
144
Usb Transceiver
1
Quadrature Decoder Channels
2
Usb Speed
Full Speed
Usb Interface
Device + OTG
Spi
7
Twi (i2c)
3
Uart
5
Can
2
Lin
5
Ssc
1
Ethernet
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
4
Dac Resolution (bits)
12
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
68
Self Program Memory
YES
External Bus Interface
1
Dram Memory
sdram
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0 to 3.6 or 4.5 to 5.5
Operating Voltage (vcc)
3.0 to 3.6 or 4.5 to 5.5
Fpu
Yes
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
22
Input Capture Channels
12
Pwm Channels
20
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT32UC3C0512CAU-ALUT
Manufacturer:
Atmel
Quantity:
10 000
9.6
Table 9-1.
Note:
32117C–AVR-08/11
Offset
0xFC
0x0C
0x1C
0x4C
0xF0
0x00
0x04
0x08
0x10
0x14
0x18
0x20
0x30
0x40
0x44
0x48
0x50
0x54
0x24
0x34
User Interface
1. The reset values are device specific. Please refer to the Module Configuration section at the end of this chapter.
2. The number of Alarm and Periodic Interval registers are device specific. Please refer to the Module Configuration section at
the end of this chapter.
AST Register Memory Map
Periodic Interval Register 0
Periodic Interval Register 1
Interrupt Disable Register
Interrupt Enable Register
Interrupt Mask Register
Clock Control Register
Wake Enable Register
Status Clear Register
Digital Tuner Register
Parameter Register
Alarm Register 0
Alarm Register 1
Version Register
Control Register
Status Register
Calendar Value
Counter Value
Event Disable
Event Enable
Event Mask
Register
(2)
(2)
(2)
(2)
Register Name
PARAMETER
VERSION
CLOCK
CALV
WER
PIR0
SCR
EVD
EVM
AR0
PIR1
DTR
EVE
IMR
AR1
IDR
IER
CR
SR
CV
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/write
Read-only
Read-only
Read/Write
Read/Write
Read-only
Read-only
Read-only
Write-only
Write-only
Write-only
Write-only
Write-only
Access
AT32UC3C
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
Reset
-
-
(1)
(1)
141

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