AT32UC3C0512CAU Atmel Corporation, AT32UC3C0512CAU Datasheet - Page 246

• Manufacturer Part Number: AT32UC3C0512CAU
• Manufacturer: Atmel Corporation

Specifications of AT32UC3C0512CAU

• Flash (kbytes): 512 Kbytes
• Pin Count: 144
• Max. Operating Frequency: 66 MHz
• Cpu: 32-bit AVR
• # Of Touch Channels: 32
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 123
• Ext Interrupts: 144
• Usb Transceiver: 1
• Quadrature Decoder Channels: 2
• Usb Speed: Full Speed
• Usb Interface: Device + OTG
• Spi: 7
• Twi (i2c): 3
• Uart: 5
• Can: 2
• Lin: 5
• Ssc: 1
• Ethernet: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 4
• Resistive Touch Screen: No
• Dac Channels: 4
• Dac Resolution (bits): 12
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 68
• Self Program Memory: YES
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0 to 3.6 or 4.5 to 5.5
• Operating Voltage (vcc): 3.0 to 3.6 or 4.5 to 5.5
• Fpu: Yes
• Mpu / Mmu: Yes / No
• Timers: 6
• Output Compare Channels: 22
• Input Capture Channels: 12
• Pwm Channels: 20
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

14.7.16
Name:
Access Type:
Offset:
Reset Value:
• OVIM: Overrun Interrupt Mask
32117C–AVR-08/11
31
23
15
7
0: The corresponding interrupt is disabled.
1: The corresponding interrupt is enabled.
This bit is cleared when the corresponding bit in OVIDR is written to one.
This bit is set when the corresponding bit in OVIER is written to one.
Note:
Channels 0 to 31 are controlled by OVIMR0.
Channels 32 to 63 are controlled by OVIMR1.
Please refer to the Module Configuration section at the end of this Chapter for device-specific channel mapping information.
Overrun Interrupt Mask Register
30
22
14
6
OVIMR0 - OVIMR1
Read-only
0x0D0 - 0x0D4
0x00000000
29
21
13
5
28
20
12
4
OVIM
OVIM
OVIM
OVIM
27
19
11
3
26
18
10
2
25
17
9
1
AT32UC3C
24
16
8
0
246