LSISASX12 LSI, LSISASX12 Datasheet - Page 8
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LSISASX12
Manufacturer Part Number
LSISASX12
Description
Manufacturer
LSI
Datasheet
1.LSISASX12.pdf
(268 pages)
Specifications of LSISASX12
Lead Free Status / Rohs Status
Not Compliant
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Quantity
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Part Number:
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LSILOGIC
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LT
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Chapter 3
Chapter 4
viii
2.3
2.4
2.5
2.6
2.7
Signal Descriptions
3.1
3.2
3.3
3.4
3.5
3.6
3.7
3.8
3.9
3.10
Register Descriptions
4.1
4.2
4.3
4.4
Contents
Copyright © 2004, 2005 by LSI Logic Corporation. All rights reserved.
Addressing
2.3.1
2.3.2
Vendor-Specific SMP Application Layer Commands
2.4.1
2.4.2
Boot Loader, Serial EEPROM, and API2C Interface
GPIO/LED and SIO Configuration
2.6.1
2.6.2
2.6.3
STP Enclosure Management Interface
2.7.1
2.7.2
2.7.3
2.7.4
2.7.5
2.7.6
Signal Types
Functional Signal Grouping
SAS/SATA Signals
Serial EEPROM Signals
I
Configuration and General-Purpose Signals
Multiplexed SIO Interface
JTAG Pins
Factory Test Pins
Power and Ground Pins
Primary Internal Registers Address Map
Configuration Manager Registers
SMP Target Registers
SPhynx Registers
4.4.1
4.4.2
2
C and EMB Signals
Address Spaces
SAS Addressing
WRITE N REGISTERS (0xC0)
READ N REGISTERS (0x40)
GPIO/LED Configuration
SIO Configuration
SGPIO Pattern Generation
Doorbell Interface
I
I
I
I
ATAPI Command Status
Link Registers
Phy Registers
2
2
2
2
C Addressing and Transfer Modes
C Error Detection
C Slave Write Operations
C Slave Read Operations
2-11
2-11
2-11
2-12
2-13
2-15
2-17
2-23
2-24
2-26
2-27
2-28
2-30
2-30
2-31
2-32
2-33
2-33
4-72
4-75
4-75
4-93
3-2
3-2
3-4
3-5
3-5
3-6
3-7
3-8
3-8
3-9
4-2
4-3
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