LSISASX12 LSI, LSISASX12 Datasheet - Page 261

• Manufacturer Part Number: LSISASX12
• Manufacturer: LSI

Specifications of LSISASX12

• Lead Free Status / Rohs Status: Not Compliant

enclosure management bridge 1-2,
enhanced SGPIO interface 2-26,
enhanced SPGIO interface
error detection
error detection control register
error log
ESD 1-8,
expander features
F
fault LED 2-7,
FIS
FIS type
fixed data field 2-17,
frame information structures
G
Gflx
GigaBlaze 1-8,
GigaBlaze RX config
GigaBlaze TX config (SAS)
GigaBlaze TX config (SATA)
global config
GPIO 1-7, 2-6, 2-7, 2-17,
GPIO control structure
GPIO signals
GPIO[3:0] 2-7, 2-24, 3-6,
ground signals
group GPIO control bits
group GPIO value bits
group override
group override register usage
I
I/O
disparity error
I2C error count
invalid dword count
invalid word
loss of synchronization
R_ERR transmitted/received count
reset sequence failure
unexpected SATA sync count
control
direction
value
supply voltage
2-28
1-2
4-45
4-85
5-2
4-42
4-42
4-129
3-6
3-6
2-31
4-50
3-9
4-95
2-4
4-95
5-2
1-6
4-119
2-19
2-21
Index
Copyright © 2004, 2005 by LSI Logic Corporation. All rights reserved.
4-118
2-25
2-25
2-25
5-3
4-96
2-24
4-96
2-26
2-21
2-28
2-21
2-26
2-31
4-120
2-27
2-5
4-120
I/O power
I/O supply current
I
IBML tLOW
IDD-Core
IDD-I/O
IDDT 3-8,
identify address
input
Inter-IC interface
interrupt bit
ISTW_ADDR
ISTW_ADDR[1:0] 2-5, 2-6, 3-5,
ISTWI
ISTWI error detection
ISTWI signals
ISTWI slave register map
J
jitter
JPAT select
JTAG 1-8,
junction temperature
L
last transfer
latch-up current
latch-up protection
LED 2-6, 2-7, 2-17,
LED control structure
LED synchronization
2
C 1-6, 2-5, 2-30, 2-31, 3-5, 4-1, 4-119,
address
signals
MEXT Control
reset
address
slave addressing
slave read
slave write operation
register map
custom
enable
signals
blinker definition
group control
signals
3-2
ISTWI slave
2-30
5-2
5-7
5-2
4-97
3-9
5-5
3-5
3-8
3-6
4-98
2-9
4-17
4-17
4-85
4-139
4-97
2-17
2-33
3-5
5-2
4-76
4-41
1-6
4-21
5-2
4-133
1-8
4-47
2-24
2-31
5-2
3-7
2-25
2-31
2-32
5-5
4-121
IX-3