LSISASX12 LSI, LSISASX12 Datasheet - Page 171

• Manufacturer Part Number: LSISASX12
• Manufacturer: LSI

Specifications of LSISASX12

• Lead Free Status / Rohs Status: Not Compliant

Register: 0x0120
Read/Write
4.4.2
31
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1
Phy Registers
Table 4.7
descriptions follow the register map.
Table 4.7
SPhynx Registers
Copyright © 2004, 2005 by LSI Logic Corporation. All rights reserved.
24 23
0x00–0x0C
Offset
0x1C
0x10
0x14
0x18
0x20
0x24
provides the SAS phy register map. Detailed register
SAS Phy Register Map
It also starts counting in the event of an OpenTimeout.
Receipt of an
OPEN_REJECT(RETRY/CONTINUE_/CONTINUE_1)
frame resets and disables the nexus timer.
Reserved
FIS Close
Setting this bit causes SATA connections to close after
every FIS. Clearing bit causes SATA connections to not
close after every instruction.
SATA Close Timeout
This register provides the timeout value in milliseconds
for closing a dormant SATA connection. The default SATA
close timeout value is 500 ms.
SATA Connection Mode
16 15
Error Log Reset Sequence Fail
Error Log Display Error
Error Log Loss of Sync
Error Log Invalid Word
Register Name
SMP Command
Reserved
Reserved
8 7
1
1 1 0 1
[31:11]
0
[9:0]
4-93
10
0
0