LSISASX12 LSI, LSISASX12 Datasheet - Page 39

• Manufacturer Part Number: LSISASX12
• Manufacturer: LSI

Specifications of LSISASX12

• Lead Free Status / Rohs Status: Not Compliant

2.5
Boot Loader, Serial EEPROM, and API2C Interface
If the size of the Request Frame is not 3 dwords, the Function Result is
0x03 to indicate INVALID REQUEST FRAME LENGTH, and no registers
are read.
The Boot Loader reads a record of configuration from an external serial
EEPROM and distributes that information to various functional blocks
within the expander.
The boot record contains two sections. The first section is a fixed field of
data that must be read to enable the part. The second section provides
optional data where both the address and data to be written is specified.
Both sections are covered by a checksum. The sum of all data and the
checksum equals zero. The null pointer following the optional data field
and the second checksum are required regardless of the inclusion of
optional data commands.
Boots are retried up to seven times if errors occur. If the boot ultimately
fails then the phys are disabled and the LSISASx12 generates an
interrupt to the Enclosure Processor.
The optional data field can configure GPIO/LEDs, nonstandard time-outs,
or any register that this document describes.
The configuration manager uses an AMBA™ Peripheral Inter-IC (API2C)
interface to read the serial EEPROM. To allow up to four expanders to
access unique configuration records from a single serial EEPROM, the
API2C serial EEPROM loader uses ISTWI_ADDR[1:0] to specify the
base vector of the configuration record. ISTWI_ADDR[1:0] provide the
least significant bits of the base vector address.
Boot Loader, Serial EEPROM, and API2C Interface
Copyright © 2004, 2005 by LSI Logic Corporation. All rights reserved.
ReadData[3] corresponds to bits [31:24] of the dword read from the
register located at address StartAdr, while ReadData[0] corresponds
to bits [7:0] of the dword read from the register located at address
StartAdr.
ReadData[7] corresponds to bits [31:24] of the dword read from the
register located at address StartAdr+4, while ReadData[4]
corresponds to bits [7:0] of the dword read from the register located
at address StartAdr+4.
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