LSISASX12 LSI, LSISASX12 Datasheet - Page 149

• Manufacturer Part Number: LSISASX12
• Manufacturer: LSI

Specifications of LSISASX12

• Lead Free Status / Rohs Status: Not Compliant

Register: 0xC054
Read/Write
31
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
This register controls the enhanced SGPIO pattern definition on the
LSISASx12A expander. This register is not present on the LSISASx12
expander.
Configuration Manager Registers
Copyright © 2004, 2005 by LSI Logic Corporation. All rights reserved.
24 23
Force Off
Amount of time to deassert a Link Active signal in units
of 1/8 seconds following a maximum assertion time. This
field is ignored if Maximum Assert field is set to 0b0000.
The default value of this field is 0b0100, indicating
4/8 seconds (1/2 seconds). The encoding for this field
follows.
Reserved
Select C
When clear, Link Activity data is provided unconditioned
to SGPIO. When set, Link Activity data is adjusted
according to controls in
SIO Control Select
This bit determines if the LSISASx12A uses the standard
SGPIO mode that the LSISASx12 uses, or if the
LSISASx12A uses the enhanced SPGIO mode that is
described in this document.
Clearing this bit enables the standard SGPIO mode.
Setting this bit enables the enhanced SGPIO mode.
SIO Adapter Control
Setting
0b0000
0b0001
0b0010
0b0011
0b1110
0b1111
16 15
...
Activity Stretch Control
Definition
14/8 s
15/8 s
1/8 s
2/8 s
3/8 s
...
8 7
–
0
0 0 0 0
register.
[31:2]
0
4-71
0
0
1
0