LSISASX12 LSI, LSISASX12 Datasheet - Page 122
LSISASX12
Manufacturer Part Number
LSISASX12
Description
Manufacturer
LSI
Datasheet
1.LSISASX12.pdf
(268 pages)
Specifications of LSISASX12
Lead Free Status / Rohs Status
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Register: 0x8010
Read/Write
Register: 0x8014
Read/Write
4-44
31
31
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Register Descriptions
Copyright © 2004, 2005 by LSI Logic Corporation. All rights reserved.
24 23
24 23
Reserved
GPIO Direction
If the Group 3 configuration is set to GPIO, then this field
controls the direction of the pin in the Group 3 pinset.
Setting the associated bit configures the pin as an output.
Clearing the associated bit configures the pin as an input.
The
the output GPIO signal, and allows observation of the
input GPIO signal.
Reserved
GPIO Direction
If the Group 4 configuration is set to GPIO, then this field
controls the direction of the pin in the Group 4 pinset.
Setting the associated bit configures the pin as an output.
Clearing the associated bit configures the pin as an input.
The
the output GPIO signal, and allows observation of the
input GPIO signal.
Group 3 GPIO Control
Group 4 GPIO Control
Group 3 GPIO Value
Group 4 GPIO Value
16 15
16 15
register controls the value of
register controls the value of
8 7
8 7
0
0
0 0 0 0
0 0 0 0
[31:12]
[31:12]
[11:0]
[11:0]
0
0
0
0
0
0
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