LSISASX12 LSI, LSISASX12 Datasheet - Page 222

• Manufacturer Part Number: LSISASX12
• Manufacturer: LSI

Specifications of LSISASX12

• Lead Free Status / Rohs Status: Not Compliant

Register: 0x604 - 0x60B
Read/Write
Register: 0x60C
Read/Write
4-144
7
0
7
0
0
0
Register Descriptions
Copyright © 2004, 2005 by LSI Logic Corporation. All rights reserved.
0
0
RR_Data0 - RR_Data7
0
0
RR_Control
RR_Data
These eight registers contain the value presented during
the data phases of a write operation on the register bus
interface. On read operations these registers contain the
data returned from the register bus. RR_Data0 contains
the least-significant byte of the data. RR_Data7 contains
the most-significant byte of the data.
Reserved
RR_Request
Setting this bit initiates the register bus operation
described in the RR_Command
registers. This bit must be cleared following the
completion of each operation on the register bus
interface.
0
0
0
0
0
0
–
0
0
0
0
RR_Command3
[7:0]
[7:1]
0