LSISASX12 LSI, LSISASX12 Datasheet - Page 259

• Manufacturer Part Number: LSISASX12
• Manufacturer: LSI

Specifications of LSISASX12

• Lead Free Status / Rohs Status: Not Compliant

Numerics
signals
A
abort command
absolute maximum stress ratings
AC characteristics
active HIGH
active LOW
activity LED 2-6,
Activity Stretch Control
address frame type
address identify
address map
address space
addressing
affiliations 4-84,
air temperature
analog voltage
API2C
API2C Global Control
API2C interface
API2C Interrupt Enable
API2C Interrupt Status 4-18, 4-19, 4-22, 4-23,
API2C Master Command
API2C Master Interrupt Status
API2C Master Receive Transfer Length
API2C Montior
API2C Receive FIFO Status
API2C Soft Reset
API2C Timer Clock Divider Control
API2C Wait Timer Control
application examples
port number encoding
SAS
4-24, 4-25, 4-26, 4-27, 4-28, 4-29, 4-30, 4-31,
4-32, 4-35, 4-36, 4-37, 4-38, 4-39,
2-17
2-7
2-11
3-1
3-1
4-2
2-11
5-2
4-23
5-2
4-134
4-76
4-107
2-18
3-6
4-24
5-7
4-77
1-3
Index
LSISASx12/LSISASx12A 3.0 Gbit/s SAS/SATA Expander Technical Manual IX-1
Copyright © 2004, 2005 by LSI Logic Corporation. All rights reserved.
4-17
4-69
4-19
2-12
4-25
4-19
4-30
4-32
5-2
4-22
4-40
4-26
arbitration
ATAPI
ATAPI command 2-29,
B
ball grid array 5-12,
bank enable
bank selection
BGA top view
blink pattern
BlinkClkin 2-7,
BlinkClkout 2-7,
block diagram 2-1,
block read transfer
block transfers
boot control
boot loader
boot record format 2-18,
boot retries
boot sequencer
boot strap loader
broadcast change
broadcast processing
broadcast SES
BSL_SCL 3-5,
BSL_SD 3-5,
byte write transfers
C
cable detection LED 2-7,
CABLE_DET[11:0]/ 2-24,
capacitance
CBL_DET[11:0]/ 2-7,
checksum 2-17, 2-19,
CLK 3-6,
clock 2-9,
command status
5-6
3-6
2-3
2-17
2-17
4-16
5-6
4-129
4-48
5-3
5-12
2-10
3-8
5-3
2-32
4-91
2-6
3-8
3-5
4-90
2-2
2-33
2-32
2-33
5-13
3-6
2-6
2-23
2-33
2-19
3-6
5-4