ST72T774J9B1 STMicroelectronics, ST72T774J9B1 Datasheet - Page 128

ST72T774J9B1

Manufacturer Part Number
ST72T774J9B1
Description
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST72T774J9B1

Cpu Family
ST7
Device Core Size
8b
Frequency (max)
24MHz
Interface Type
I2C/USB
Program Memory Type
EPROM
Program Memory Size
60KB
Total Internal Ram Size
1KB
# I/os (max)
31
Number Of Timers - General Purpose
1
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
4V
On-chip Adc
1-chx8-bit
On-chip Dac
1-chx8-bit
Instruction Set Architecture
CISC
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Through Hole
Pin Count
42
Package Type
SPDIP
Lead Free Status / Rohs Status
Specific Sites Compliant

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ST72774/ST727754/ST72734
The pointer address is a byte, the pointer size is a
word, thus allowing 64 Kbyte addressing space,
and requires 1 byte after the opcode.
5.1.6 Indirect Indexed (Short, Long)
This is a combination of indirect and short indexed
addressing modes. The operand is referenced by
its memory address, which is defined by the
unsigned addition of an index register value (X or
Y) with a pointer value located in memory. The
pointer address follows the opcode.
The indirect indexed addressing mode consists of
two sub-modes:
Indirect Indexed (Short)
The pointer address is a byte, the pointer size is a
byte, thus allowing 00 - 1FE addressing space,
and requires 1 byte after the opcode.
Indirect Indexed (Long)
The pointer address is a byte, the pointer size is a
word, thus allowing 64 Kbyte addressing space,
and requires 1 byte after the opcode.
Table 32. Instructions Supporting Direct,
Indexed,
Addressing Modes
128/144
LD
CP
AND, OR, XOR
ADC, ADD, SUB, SBC
BCP
Long and Short
Instructions
Indirect
and
Load
Compare
Logical Operations
Arithmetic Addition/subtrac-
tion operations
Bit Compare
Indirect
Function
Indexed
5.1.7 Relative mode (Direct, Indirect)
This addressing mode is used to modify the PC
register value, by adding an 8-bit signed offset to it.
The relative addressing mode consists of two sub-
modes:
Relative (Direct)
The offset follows the opcode.
Relative (Indirect)
The offset is defined in memory, of which the ad-
dress follows the opcode.
Short Instructions Only
Available Relative Direct/
CLR
INC, DEC
TNZ
CPL, NEG
BSET, BRES
BTJT, BTJF
SLL, SRL, SRA, RLC,
RRC
SWAP
CALL, JP
JRxx
CALLR
Indirect Instructions
Clear
Increment/Decrement
Test Negative or Zero
1 or 2 Complement
Bit Operations
Bit Test and Jump Opera-
tions
Shift and Rotate Operations
Swap Nibbles
Call or Jump subroutine
Conditional Jump
Call Relative
Function
Function

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